Add basic 9-channel BCM output
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66381c3cb6
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src/led.c
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170
src/led.c
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#include "led.h"
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#include "stm32f030x6.h"
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#define LED_ODR_MASK ((1 << PIN_LED_R_0) | (1 << PIN_LED_G_0) \
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| (1 << PIN_LED_B_0) | (1 << PIN_LED_R_1) \
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| (1 << PIN_LED_G_1) | (1 << PIN_LED_B_1) \
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| (1 << PIN_LED_R_2) | (1 << PIN_LED_G_2) \
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| (1 << PIN_LED_B_2))
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#define LED_MODER_MASK ((3 << PIN_LED_R_0 * 2) | (3 << PIN_LED_G_0 * 2) \
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| (3 << PIN_LED_B_0 * 2) | (3 << PIN_LED_R_1 * 2) \
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| (3 << PIN_LED_G_1 * 2) | (3 << PIN_LED_B_1 * 2) \
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| (3 << PIN_LED_R_2 * 2) | (3 << PIN_LED_G_2 * 2) \
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| (3 << PIN_LED_B_2 * 2))
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#define LED_MODER ((1 << PIN_LED_R_0 * 2) | (1 << PIN_LED_G_0 * 2) \
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| (1 << PIN_LED_B_0 * 2) | (1 << PIN_LED_R_1 * 2) \
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| (1 << PIN_LED_G_1 * 2) | (1 << PIN_LED_B_1 * 2) \
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| (1 << PIN_LED_R_2 * 2) | (1 << PIN_LED_G_2 * 2) \
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| (1 << PIN_LED_B_2 * 2))
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uint8_t LED_Data[LED_COUNT] = {0, 63, 200, 255};
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// TIM3 is clocked by APB1 and thus receives only half the system clock. The 4
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// LSBs have bit lengths 2, 4, 8, and 16 cycles and are generated blocking from
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// an inline assembly block and are thus not in this table.
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static const uint16_t LED_BitLengths[LED_BITS - 4] =
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{
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16, 32, 64, 128, 256, 512, 1024, 2048
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};
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static uint16_t LED_DMABuffer[LED_BITS + 1];
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static void LED_RefreshDMABuffer(void)
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{
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for(int i = 0; i < LED_COUNT; i++)
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{
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uint16_t gamma_corrected = (uint16_t)LED_Data[i] * LED_Data[i];
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gamma_corrected >>= 16 - LED_BITS;
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for(int j = 0; j < LED_BITS; j++)
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{
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if(gamma_corrected & (1 << j))
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{
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LED_DMABuffer[j] |= 1 << i;
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}
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else
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{
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LED_DMABuffer[j] &= ~(1 << i);
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}
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}
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}
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// Data to reset outputs after all data bits are sent
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LED_DMABuffer[LED_BITS] = 0x0000;
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}
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static void LED_StartBCM(void)
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{
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// Reset DMA and timer
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TIM3->CR1 = 0x0000;
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TIM3->DIER = 0x0000;
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TIM3->CNT = 0;
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DMA1_Channel3->CCR = 0x0000;
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DMA1_Channel4->CCR = 0x0000;
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TIM3->ARR = 1; // Delay before everything starts with the first DMA request
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TIM3->CR1 = TIM_CR1_ARPE;
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// Since ARPE is set, this write goes to ARR's shadow register
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TIM3->ARR = LED_BitLengths[0];
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TIM3->DIER = TIM_DIER_UDE | TIM_DIER_CC1DE;
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// DMA channel 3: Output data to port a on TIM3 update
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DMA1_Channel3->CMAR = (uint32_t)&(LED_DMABuffer[4]);
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// One transfer for each bit plus one to set the outputs to zero again.
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// The first 4 are sent out with assembly before the first DMA transfer.
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DMA1_Channel3->CNDTR = LED_BITS + 1 - 4;
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// Highest priority, 16 bits, increment memory, memory to peripheral
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DMA1_Channel3->CCR = DMA_CCR_PL | DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0
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| DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_EN | DMA_CCR_TCIE;
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// DMA channel 3: Output data to port a on TIM3 update
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// The bit lengths table is offset because the first value is already in
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// the timer's ARR shadow register.
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DMA1_Channel4->CMAR = (uint32_t)&(LED_BitLengths[1]);
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// The first four bits are sent out with the assembly code below, so only
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// LED_BITS - 5 bit lengths are needed.
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DMA1_Channel4->CNDTR = LED_BITS - 1 - 4;
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// 16 bits, memory increment mode, memory to peripheral
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DMA1_Channel4->CCR = DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0 | DMA_CCR_MINC
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| DMA_CCR_DIR | DMA_CCR_EN;
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// Send the 4 LSBs, set to zero at the end (so the timing is independent
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// from the delay intrudoced by the DMA)
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__asm__ volatile(".syntax unified\n"
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"str %[d0], [%[odr]];"
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"str %[d1], [%[odr]];"
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"nop;"
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"nop;"
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"str %[d2], [%[odr]];"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"str %[d3], [%[odr]];"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"nop;"
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"str %[zero], [%[odr]];"
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:
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: [odr] "l" ((uint32_t)&(GPIOA->ODR)),
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[d0] "r" (LED_DMABuffer[0]),
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[d1] "r" (LED_DMABuffer[1]),
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[d2] "r" (LED_DMABuffer[2]),
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[d3] "r" (LED_DMABuffer[3]),
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[zero] "r" (0)
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:);
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// Enable TIM3 for the rest of the bits
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TIM3->CR1 = TIM_CR1_ARPE | TIM_CR1_CEN;
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}
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void LED_Init(void)
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{
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RCC->AHBENR |= RCC_AHBENR_GPIOAEN;
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RCC->AHBENR |= RCC_AHBENR_DMA1EN;
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RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
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GPIOA->ODR &= ~LED_ODR_MASK;
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GPIOA->MODER = (GPIOA->MODER & ~LED_MODER_MASK) | LED_MODER;
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TIM3->CR1 = 0x0000;
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TIM3->PSC = 0;
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// CH1 will be used for DMA requests updating ARR
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TIM3->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1;
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TIM3->CCER = TIM_CCER_CC1E;
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TIM3->CCR1 = 1;
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// DMA channel 3: Output data to port a on TIM3 update
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DMA1_Channel3->CPAR = (uint32_t)&(GPIOA->ODR);
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// DMA channel 4: Update TIM3 ARR on TIM3 CH1 (which is set to 0)
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DMA1_Channel4->CPAR = (uint32_t)&(TIM3->ARR);
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NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
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LED_RefreshDMABuffer();
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LED_StartBCM();
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}
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void DMA1_Channel2_3_IRQHandler(void)
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{
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// Interrupt when all bits have been sent
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DMA1->IFCR = DMA_IFCR_CTCIF3;
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// Start sending bits out again
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LED_StartBCM();
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}
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10
src/led.h
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10
src/led.h
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#pragma once
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#include "stm32f030x6.h"
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#include "pinning.h"
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#define LED_BITS 12
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#define LED_COUNT 9
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void LED_Init(void);
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int main(void)
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int main(void)
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{
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{
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LED_Init();
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while(1)
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while(1)
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{
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{
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}
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}
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#include "stm32f030x6.h"
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#include "stm32f030x6.h"
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#include "buildid.h"
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#include "buildid.h"
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#include "led.h"
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int main(void);
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int main(void);
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12
src/pinning.h
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12
src/pinning.h
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#pragma once
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// Port A
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#define PIN_LED_R_0 0
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#define PIN_LED_G_0 1
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#define PIN_LED_B_0 2
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#define PIN_LED_R_1 3
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#define PIN_LED_G_1 4
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#define PIN_LED_B_1 5
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#define PIN_LED_R_2 6
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#define PIN_LED_G_2 7
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#define PIN_LED_B_2 9
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