From f3edcd1c269789baa5fce51c462b34ac75809ac4 Mon Sep 17 00:00:00 2001 From: fruchti Date: Sun, 27 Sep 2020 23:53:08 +0200 Subject: [PATCH] Fix BCM comments --- build-number.txt | 2 +- src/led.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/build-number.txt b/build-number.txt index 31cf34b..3cda32f 100644 --- a/build-number.txt +++ b/build-number.txt @@ -1 +1 @@ -513 +515 diff --git a/src/led.c b/src/led.c index 197699d..f644614 100644 --- a/src/led.c +++ b/src/led.c @@ -144,7 +144,7 @@ static void LED_StartBCM(int row) TIM3->ARR = LED_BitLengths[0]; TIM3->DIER = TIM_DIER_UDE | TIM_DIER_CC1DE; - // DMA channel 3: Output data to port a on TIM3 update + // DMA channel 3: output data to port a on TIM3 update event DMA1_Channel3->CMAR = (uint32_t)&(LED_FrontBuffer[row * (LED_BITS + 1) + 4]); // One transfer for each bit plus one to set the outputs to zero again. // The first 4 are sent out with assembly before the first DMA transfer. @@ -153,7 +153,7 @@ static void LED_StartBCM(int row) DMA1_Channel3->CCR = DMA_CCR_PL | DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0 | DMA_CCR_MINC | DMA_CCR_DIR | DMA_CCR_EN | DMA_CCR_TCIE; - // DMA channel 3: Output data to port a on TIM3 update + // DMA channel 4: update TIM3 ARR on TIM3 compare 1 match // The bit lengths table is offset because the first value is already in // the timer's ARR shadow register. DMA1_Channel4->CMAR = (uint32_t)&(LED_BitLengths[1]);