56 lines
1.3 KiB
C
56 lines
1.3 KiB
C
#include "main.h"
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static void Clock_Init(void)
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{
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// Activate HSE and wait for it to be ready
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RCC->CR = RCC_CR_HSEON;
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while(!(RCC->CR & RCC_CR_HSERDY));
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RCC->CFGR = RCC_CFGR_SW_0;
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while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_0);
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FLASH->ACR |= FLASH_ACR_LATENCY_1;
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// Set PLL to x9 (-> 72MHz system clock)
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RCC->CFGR |= RCC_CFGR_PLLMULL9 | RCC_CFGR_PLLSRC | RCC_CFGR_PPRE1_2;
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// Activate PLL and wait
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RCC->CR |= RCC_CR_PLLON;
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while(!(RCC->CR & RCC_CR_PLLRDY));
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// Select PLL as clock source
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RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_SW) | RCC_CFGR_SW_1;
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// Resulting clocks:
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// SYSCLK, AHB, APB2 72 Mhz
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// APB1, ADC 36 MHz
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#if (CLOCK_SYSCLK != 72000000) || (CLOCK_AHB != 72000000) \
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|| (CLOCK_APB1 != 36000000) || (CLOCK_APB2 != 72000000)
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#error Clock initialisation does not match definitions in clock.h.
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#endif
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// Disable all interrupts
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RCC->CIR = 0x00000000;
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}
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int main(void)
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{
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Clock_Init();
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LED_Init();
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USB_Init();
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Output_Init();
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LED_On(LED_Orange);
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// uint8_t buffer[32];
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for(;;)
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{
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// int length = USBCDC_ReceiveData(buffer, sizeof(buffer));
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// if(length)
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// {
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// USBCDC_SendData(buffer, length);
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// }
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// __WFI();
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HPGL_Poll();
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}
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}
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