update experimental branch

This commit is contained in:
cnlohr 2018-11-18 15:27:29 -05:00
parent 2a0c78d526
commit bdbab3be8b
7 changed files with 162 additions and 35 deletions

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@ -38,24 +38,24 @@
struct CCSettings
{
uint8_t gSETTINGS_KEY;
uint8_t gROOT_NOTE_OFFSET; //Set to define what the root note is. 0 = A.
uint8_t gDFTIIR; //=6
uint8_t gFUZZ_IIR_BITS; //=1
uint8_t gFILTER_BLUR_PASSES; //=2
uint8_t gSEMIBITSPERBIN; //=3
uint8_t gMAX_JUMP_DISTANCE; //=4
uint8_t gMAX_COMBINE_DISTANCE; //=7
uint8_t gAMP_1_IIR_BITS; //=4
uint8_t gAMP_2_IIR_BITS; //=2
uint8_t gMIN_AMP_FOR_NOTE; //=80
uint8_t gMINIMUM_AMP_FOR_NOTE_TO_DISAPPEAR; //=64
uint8_t gNOTE_FINAL_AMP; //=12
uint8_t gNERF_NOTE_PORP; //=15
uint8_t gUSE_NUM_LIN_LEDS; // = NUM_LIN_LEDS
uint8_t gCOLORCHORD_ACTIVE;
uint8_t gCOLORCHORD_OUTPUT_DRIVER;
uint8_t gINITIAL_AMP;
uint16_t gSETTINGS_KEY;
uint16_t gROOT_NOTE_OFFSET; //Set to define what the root note is. 0 = A.
uint16_t gDFTIIR; //=6
uint16_t gFUZZ_IIR_BITS; //=1
uint16_t gFILTER_BLUR_PASSES; //=2
uint16_t gSEMIBITSPERBIN; //=3
uint16_t gMAX_JUMP_DISTANCE; //=4
uint16_t gMAX_COMBINE_DISTANCE; //=7
uint16_t gAMP_1_IIR_BITS; //=4
uint16_t gAMP_2_IIR_BITS; //=2
uint16_t gMIN_AMP_FOR_NOTE; //=80
uint16_t gMINIMUM_AMP_FOR_NOTE_TO_DISAPPEAR; //=64
uint16_t gNOTE_FINAL_AMP; //=12
uint16_t gNERF_NOTE_PORP; //=15
uint16_t gUSE_NUM_LIN_LEDS; // = NUM_LIN_LEDS
uint16_t gCOLORCHORD_ACTIVE;
uint16_t gCOLORCHORD_OUTPUT_DRIVER;
uint16_t gINITIAL_AMP;
};
extern struct CCSettings CCS;

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@ -8,7 +8,7 @@ PORT = /dev/ttyUSB0 # could also be /dev/ttyACM0
WEB_PORT = 80
COM_PORT = 7777
BACKEND_PORT = 7878
PAGE_OFFSET = 65536 # 1048576
MFS_PAGE_OFFSET = 532480 # 0x82000
#SDK_DEFAULT = $(HOME)/esp8266/esp-open-sdk
ESP_GCC_VERS = 4.8.5
@ -17,16 +17,20 @@ PAGE_SCRIPTS = main.js
FWBURNFLAGS = -b 2000000
OPTS += -DUSE_OPTIMIZE_PRINTF
OPTS += -DMFS_PAGE_OFFSET=$(MFS_PAGE_OFFSET)
OPTS += -DICACHE_FLASH
OPTS += -DDISABLE_CHARRX #Saves about 48 bytes.
OPTS += -DQUIET_REFLASH #Saves about 128 bytes.
OPTS += -DDISABLE_CHARRX #Saves about 300 bytes.
OPTS += -DQUIET_REFLASH #Saves about 96 bytes.
OPTS += -DWS2812_FOUR_SAMPLE #Saves about 224 bytes.
#OPTS += -DWS2812_THREE_SAMPLE
OPTS += -DDISABLE_NET_REFLASH
#OPTS += -DVERIFY_FLASH_WRITE
#OPTS += -DDEBUG
#OPTS += -DFREQ=12500
STRIPPED_LIBGCC=YES
PAGE_TITLE = ColorChord Control Panel
PAGE_SCRIPT =
PAGE_HEADING = ColorChord: Embedded

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@ -22,9 +22,9 @@ struct SaveLoad
struct CCSettings CCS;
uint8_t gConfigDefaults[CONFIGURABLES] = { 0, 6, 1, 2, 3, 4, 7, 4, 2, 80, 64, 12, 15, NUM_LIN_LEDS, 1, 0, 16, 0 };
uint16_t gConfigDefaults[CONFIGURABLES] = { 0, 6, 1, 2, 3, 4, 7, 4, 2, 80, 64, 12, 15, NUM_LIN_LEDS, 1, 0, 16, 0 };
uint8_t * gConfigurables[CONFIGURABLES] = { &CCS.gROOT_NOTE_OFFSET, &CCS.gDFTIIR, &CCS.gFUZZ_IIR_BITS, &CCS.gFILTER_BLUR_PASSES,
uint16_t * gConfigurables[CONFIGURABLES] = { &CCS.gROOT_NOTE_OFFSET, &CCS.gDFTIIR, &CCS.gFUZZ_IIR_BITS, &CCS.gFILTER_BLUR_PASSES,
&CCS.gSEMIBITSPERBIN, &CCS.gMAX_JUMP_DISTANCE, &CCS.gMAX_COMBINE_DISTANCE, &CCS.gAMP_1_IIR_BITS,
&CCS.gAMP_2_IIR_BITS, &CCS.gMIN_AMP_FOR_NOTE, &CCS.gMINIMUM_AMP_FOR_NOTE_TO_DISAPPEAR, &CCS.gNOTE_FINAL_AMP,
&CCS.gNERF_NOTE_PORP, &CCS.gUSE_NUM_LIN_LEDS, &CCS.gCOLORCHORD_ACTIVE, &CCS.gCOLORCHORD_OUTPUT_DRIVER, &CCS.gINITIAL_AMP, 0 };

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@ -29,7 +29,7 @@
#define procTaskQueueLen 1
struct CCSettings CCS;
static volatile os_timer_t some_timer;
static os_timer_t some_timer;
static struct espconn *pUdpServer;
void EnterCritical();
@ -43,10 +43,6 @@ static uint8_t hpa_running = 0;
static uint8_t hpa_is_paused_for_wifi;
void ICACHE_FLASH_ATTR CustomStart( );
void ICACHE_FLASH_ATTR user_rf_pre_init()
{
}
//Call this once we've stacked together one full colorchord frame.
static void NewFrame()
@ -73,6 +69,10 @@ os_event_t procTaskQueue[procTaskQueueLen];
uint32_t samp_iir = 0;
int wf = 0;
void fpm_wakup_cb_func1(void) { wifi_fpm_close(); }
//Tasks that happen all the time.
static void procTask(os_event_t *events)
@ -119,7 +119,6 @@ static void procTask(os_event_t *events)
{
CSTick( 0 );
}
}
//Timer event.
@ -127,6 +126,21 @@ static void ICACHE_FLASH_ATTR myTimer(void *arg)
{
CSTick( 1 );
if( GPIO_INPUT_GET( 0 ) == 0 )
{
if( system_get_rst_info()->reason != 5 ) //See if we're booting from deep sleep. (5 = deep sleep, 4 = reboot, 0 = fresh boot)
{
system_deep_sleep_set_option(4); //Option 4 = When rebooting from deep sleep, totally disable wifi.
system_deep_sleep(2000);
}
else
{
//system_deep_sleep_set_option(1); //Option 1 = Reboot with radio recalibration and wifi on.
//system_deep_sleep(2000);
system_restart();
}
}
if( hpa_is_paused_for_wifi && printed_ip )
{
StartHPATimer(); //Init the high speed ADC timer.
@ -156,7 +170,6 @@ void ICACHE_FLASH_ATTR charrx( uint8_t c )
//Called from UART.
}
void ICACHE_FLASH_ATTR user_init(void)
{
uart_init(BIT_RATE_115200, BIT_RATE_115200);
@ -192,7 +205,7 @@ void ICACHE_FLASH_ATTR user_init(void)
while(1) { uart0_sendStr( "\r\nFAULT\r\n" ); }
}
CSInit();
CSInit( 1 );
//Add a process
system_os_task(procTask, procTaskPrio, procTaskQueue, procTaskQueueLen);
@ -227,25 +240,135 @@ void ICACHE_FLASH_ATTR user_init(void)
ws2812_init();
printf( "RST REASON: %d\n", system_get_rst_info()->reason );
// Attempt to make ADC more stable
// https://github.com/esp8266/Arduino/issues/2070
// see peripherals https://espressif.com/en/support/explore/faq
//wifi_set_sleep_type(NONE_SLEEP_T); // on its own stopped wifi working
wifi_set_sleep_type(MODEM_SLEEP_T); // on its own stopped wifi working?
//wifi_fpm_set_sleep_type(NONE_SLEEP_T); // with this seemed no difference
system_os_post(procTaskPrio, 0, 0 );
}
void EnterCritical()
void ICACHE_FLASH_ATTR EnterCritical()
{
PauseHPATimer();
//ets_intr_lock();
}
void ExitCritical()
void ICACHE_FLASH_ATTR ExitCritical()
{
//ets_intr_unlock();
ContinueHPATimer();
}
/*==============================================================================
* Partition Map Data
*============================================================================*/
#define SYSTEM_PARTITION_OTA_SIZE_OPT2 0x6A000
#define SYSTEM_PARTITION_OTA_2_ADDR_OPT2 0x81000
#define SYSTEM_PARTITION_RF_CAL_ADDR_OPT2 0xfb000
#define SYSTEM_PARTITION_PHY_DATA_ADDR_OPT2 0xfc000
#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT2 0xfd000
#define SYSTEM_PARTITION_CUSTOMER_PRIV_PARAM_ADDR_OPT2 0x7c000
#define SPI_FLASH_SIZE_MAP_OPT2 2
#define SYSTEM_PARTITION_OTA_SIZE_OPT3 0x6A000
#define SYSTEM_PARTITION_OTA_2_ADDR_OPT3 0x81000
#define SYSTEM_PARTITION_RF_CAL_ADDR_OPT3 0x1fb000
#define SYSTEM_PARTITION_PHY_DATA_ADDR_OPT3 0x1fc000
#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT3 0x1fd000
#define SYSTEM_PARTITION_CUSTOMER_PRIV_PARAM_ADDR_OPT3 0x7c000
#define SPI_FLASH_SIZE_MAP_OPT3 3
#define SYSTEM_PARTITION_OTA_SIZE_OPT4 0x6A000
#define SYSTEM_PARTITION_OTA_2_ADDR_OPT4 0x81000
#define SYSTEM_PARTITION_RF_CAL_ADDR_OPT4 0x3fb000
#define SYSTEM_PARTITION_PHY_DATA_ADDR_OPT4 0x3fc000
#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT4 0x3fd000
#define SYSTEM_PARTITION_CUSTOMER_PRIV_PARAM_ADDR_OPT4 0x7c000
#define SPI_FLASH_SIZE_MAP_OPT4 4
#define SYSTEM_PARTITION_CUSTOMER_PRIV_PARAM SYSTEM_PARTITION_CUSTOMER_BEGIN
#define EAGLE_FLASH_BIN_ADDR SYSTEM_PARTITION_CUSTOMER_BEGIN + 1
#define EAGLE_IROM0TEXT_BIN_ADDR SYSTEM_PARTITION_CUSTOMER_BEGIN + 2
static const partition_item_t partition_table_opt2[] =
{
{ EAGLE_FLASH_BIN_ADDR, 0x00000, 0x10000},
{ EAGLE_IROM0TEXT_BIN_ADDR, 0x10000, 0x60000},
{ SYSTEM_PARTITION_RF_CAL, SYSTEM_PARTITION_RF_CAL_ADDR_OPT2, 0x1000},
{ SYSTEM_PARTITION_PHY_DATA, SYSTEM_PARTITION_PHY_DATA_ADDR_OPT2, 0x1000},
{ SYSTEM_PARTITION_SYSTEM_PARAMETER, SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT2, 0x3000},
};
static const partition_item_t partition_table_opt3[] =
{
{ EAGLE_FLASH_BIN_ADDR, 0x00000, 0x10000},
{ EAGLE_IROM0TEXT_BIN_ADDR, 0x10000, 0x60000},
{ SYSTEM_PARTITION_RF_CAL, SYSTEM_PARTITION_RF_CAL_ADDR_OPT3, 0x1000},
{ SYSTEM_PARTITION_PHY_DATA, SYSTEM_PARTITION_PHY_DATA_ADDR_OPT3, 0x1000},
{ SYSTEM_PARTITION_SYSTEM_PARAMETER, SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT3, 0x3000},
};
static const partition_item_t partition_table_opt4[] =
{
{ EAGLE_FLASH_BIN_ADDR, 0x00000, 0x10000},
{ EAGLE_IROM0TEXT_BIN_ADDR, 0x10000, 0x60000},
{ SYSTEM_PARTITION_RF_CAL, SYSTEM_PARTITION_RF_CAL_ADDR_OPT4, 0x1000},
{ SYSTEM_PARTITION_PHY_DATA, SYSTEM_PARTITION_PHY_DATA_ADDR_OPT4, 0x1000},
{ SYSTEM_PARTITION_SYSTEM_PARAMETER, SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT4, 0x3000},
};
/**
* This is called on boot for versions ESP8266_NONOS_SDK_v1.5.2 to
* ESP8266_NONOS_SDK_v2.2.1. system_phy_set_rfoption() may be called here
*/
void user_rf_pre_init(void)
{
; // nothing
}
/**
* Required function as of ESP8266_NONOS_SDK_v3.0.0. Must call
* system_partition_table_regist(). This tries to register a few different
* partition maps. The ESP should be happy with one of them.
*/
void ICACHE_FLASH_ATTR user_pre_init(void)
{
if(system_partition_table_regist(
partition_table_opt2,
sizeof(partition_table_opt2) / sizeof(partition_table_opt2[0]),
SPI_FLASH_SIZE_MAP_OPT2))
{
os_printf("system_partition_table_regist 2 success!!\r\n");
}
else if(system_partition_table_regist(
partition_table_opt4,
sizeof(partition_table_opt4) / sizeof(partition_table_opt4[0]),
SPI_FLASH_SIZE_MAP_OPT4))
{
os_printf("system_partition_table_regist 4 success!!\r\n");
}
else if(system_partition_table_regist(
partition_table_opt3,
sizeof(partition_table_opt3) / sizeof(partition_table_opt3[0]),
SPI_FLASH_SIZE_MAP_OPT3))
{
os_printf("system_partition_table_regist 3 success!!\r\n");
}
else
{
os_printf("system_partition_table_regist all fail\r\n");
while(1);
}
}

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