update experimental branch
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@ -38,24 +38,24 @@
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struct CCSettings
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{
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uint8_t gSETTINGS_KEY;
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uint8_t gROOT_NOTE_OFFSET; //Set to define what the root note is. 0 = A.
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uint8_t gDFTIIR; //=6
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uint8_t gFUZZ_IIR_BITS; //=1
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uint8_t gFILTER_BLUR_PASSES; //=2
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uint8_t gSEMIBITSPERBIN; //=3
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uint8_t gMAX_JUMP_DISTANCE; //=4
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uint8_t gMAX_COMBINE_DISTANCE; //=7
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uint8_t gAMP_1_IIR_BITS; //=4
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uint8_t gAMP_2_IIR_BITS; //=2
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uint8_t gMIN_AMP_FOR_NOTE; //=80
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uint8_t gMINIMUM_AMP_FOR_NOTE_TO_DISAPPEAR; //=64
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uint8_t gNOTE_FINAL_AMP; //=12
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uint8_t gNERF_NOTE_PORP; //=15
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uint8_t gUSE_NUM_LIN_LEDS; // = NUM_LIN_LEDS
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uint8_t gCOLORCHORD_ACTIVE;
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uint8_t gCOLORCHORD_OUTPUT_DRIVER;
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uint8_t gINITIAL_AMP;
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uint16_t gSETTINGS_KEY;
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uint16_t gROOT_NOTE_OFFSET; //Set to define what the root note is. 0 = A.
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uint16_t gDFTIIR; //=6
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uint16_t gFUZZ_IIR_BITS; //=1
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uint16_t gFILTER_BLUR_PASSES; //=2
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uint16_t gSEMIBITSPERBIN; //=3
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uint16_t gMAX_JUMP_DISTANCE; //=4
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uint16_t gMAX_COMBINE_DISTANCE; //=7
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uint16_t gAMP_1_IIR_BITS; //=4
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uint16_t gAMP_2_IIR_BITS; //=2
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uint16_t gMIN_AMP_FOR_NOTE; //=80
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uint16_t gMINIMUM_AMP_FOR_NOTE_TO_DISAPPEAR; //=64
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uint16_t gNOTE_FINAL_AMP; //=12
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uint16_t gNERF_NOTE_PORP; //=15
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uint16_t gUSE_NUM_LIN_LEDS; // = NUM_LIN_LEDS
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uint16_t gCOLORCHORD_ACTIVE;
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uint16_t gCOLORCHORD_OUTPUT_DRIVER;
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uint16_t gINITIAL_AMP;
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};
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extern struct CCSettings CCS;
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@ -8,7 +8,7 @@ PORT = /dev/ttyUSB0 # could also be /dev/ttyACM0
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WEB_PORT = 80
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COM_PORT = 7777
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BACKEND_PORT = 7878
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PAGE_OFFSET = 65536 # 1048576
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MFS_PAGE_OFFSET = 532480 # 0x82000
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#SDK_DEFAULT = $(HOME)/esp8266/esp-open-sdk
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ESP_GCC_VERS = 4.8.5
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@ -17,16 +17,20 @@ PAGE_SCRIPTS = main.js
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FWBURNFLAGS = -b 2000000
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OPTS += -DUSE_OPTIMIZE_PRINTF
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OPTS += -DMFS_PAGE_OFFSET=$(MFS_PAGE_OFFSET)
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OPTS += -DICACHE_FLASH
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OPTS += -DDISABLE_CHARRX #Saves about 48 bytes.
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OPTS += -DQUIET_REFLASH #Saves about 128 bytes.
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OPTS += -DDISABLE_CHARRX #Saves about 300 bytes.
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OPTS += -DQUIET_REFLASH #Saves about 96 bytes.
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OPTS += -DWS2812_FOUR_SAMPLE #Saves about 224 bytes.
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#OPTS += -DWS2812_THREE_SAMPLE
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OPTS += -DDISABLE_NET_REFLASH
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#OPTS += -DVERIFY_FLASH_WRITE
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#OPTS += -DDEBUG
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#OPTS += -DFREQ=12500
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STRIPPED_LIBGCC=YES
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PAGE_TITLE = ColorChord Control Panel
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PAGE_SCRIPT =
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PAGE_HEADING = ColorChord: Embedded
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@ -22,9 +22,9 @@ struct SaveLoad
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struct CCSettings CCS;
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uint8_t gConfigDefaults[CONFIGURABLES] = { 0, 6, 1, 2, 3, 4, 7, 4, 2, 80, 64, 12, 15, NUM_LIN_LEDS, 1, 0, 16, 0 };
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uint16_t gConfigDefaults[CONFIGURABLES] = { 0, 6, 1, 2, 3, 4, 7, 4, 2, 80, 64, 12, 15, NUM_LIN_LEDS, 1, 0, 16, 0 };
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uint8_t * gConfigurables[CONFIGURABLES] = { &CCS.gROOT_NOTE_OFFSET, &CCS.gDFTIIR, &CCS.gFUZZ_IIR_BITS, &CCS.gFILTER_BLUR_PASSES,
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uint16_t * gConfigurables[CONFIGURABLES] = { &CCS.gROOT_NOTE_OFFSET, &CCS.gDFTIIR, &CCS.gFUZZ_IIR_BITS, &CCS.gFILTER_BLUR_PASSES,
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&CCS.gSEMIBITSPERBIN, &CCS.gMAX_JUMP_DISTANCE, &CCS.gMAX_COMBINE_DISTANCE, &CCS.gAMP_1_IIR_BITS,
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&CCS.gAMP_2_IIR_BITS, &CCS.gMIN_AMP_FOR_NOTE, &CCS.gMINIMUM_AMP_FOR_NOTE_TO_DISAPPEAR, &CCS.gNOTE_FINAL_AMP,
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&CCS.gNERF_NOTE_PORP, &CCS.gUSE_NUM_LIN_LEDS, &CCS.gCOLORCHORD_ACTIVE, &CCS.gCOLORCHORD_OUTPUT_DRIVER, &CCS.gINITIAL_AMP, 0 };
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@ -29,7 +29,7 @@
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#define procTaskQueueLen 1
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struct CCSettings CCS;
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static volatile os_timer_t some_timer;
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static os_timer_t some_timer;
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static struct espconn *pUdpServer;
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void EnterCritical();
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@ -43,10 +43,6 @@ static uint8_t hpa_running = 0;
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static uint8_t hpa_is_paused_for_wifi;
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void ICACHE_FLASH_ATTR CustomStart( );
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void ICACHE_FLASH_ATTR user_rf_pre_init()
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{
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}
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//Call this once we've stacked together one full colorchord frame.
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static void NewFrame()
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@ -73,6 +69,10 @@ os_event_t procTaskQueue[procTaskQueueLen];
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uint32_t samp_iir = 0;
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int wf = 0;
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void fpm_wakup_cb_func1(void) { wifi_fpm_close(); }
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//Tasks that happen all the time.
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static void procTask(os_event_t *events)
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@ -119,7 +119,6 @@ static void procTask(os_event_t *events)
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{
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CSTick( 0 );
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}
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}
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//Timer event.
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@ -127,6 +126,21 @@ static void ICACHE_FLASH_ATTR myTimer(void *arg)
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{
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CSTick( 1 );
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if( GPIO_INPUT_GET( 0 ) == 0 )
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{
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if( system_get_rst_info()->reason != 5 ) //See if we're booting from deep sleep. (5 = deep sleep, 4 = reboot, 0 = fresh boot)
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{
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system_deep_sleep_set_option(4); //Option 4 = When rebooting from deep sleep, totally disable wifi.
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system_deep_sleep(2000);
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}
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else
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{
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//system_deep_sleep_set_option(1); //Option 1 = Reboot with radio recalibration and wifi on.
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//system_deep_sleep(2000);
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system_restart();
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}
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}
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if( hpa_is_paused_for_wifi && printed_ip )
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{
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StartHPATimer(); //Init the high speed ADC timer.
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@ -156,7 +170,6 @@ void ICACHE_FLASH_ATTR charrx( uint8_t c )
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//Called from UART.
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}
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void ICACHE_FLASH_ATTR user_init(void)
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{
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uart_init(BIT_RATE_115200, BIT_RATE_115200);
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@ -192,7 +205,7 @@ void ICACHE_FLASH_ATTR user_init(void)
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while(1) { uart0_sendStr( "\r\nFAULT\r\n" ); }
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}
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CSInit();
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CSInit( 1 );
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//Add a process
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system_os_task(procTask, procTaskPrio, procTaskQueue, procTaskQueueLen);
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ws2812_init();
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printf( "RST REASON: %d\n", system_get_rst_info()->reason );
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// Attempt to make ADC more stable
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// https://github.com/esp8266/Arduino/issues/2070
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// see peripherals https://espressif.com/en/support/explore/faq
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//wifi_set_sleep_type(NONE_SLEEP_T); // on its own stopped wifi working
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wifi_set_sleep_type(MODEM_SLEEP_T); // on its own stopped wifi working?
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//wifi_fpm_set_sleep_type(NONE_SLEEP_T); // with this seemed no difference
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system_os_post(procTaskPrio, 0, 0 );
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}
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void EnterCritical()
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void ICACHE_FLASH_ATTR EnterCritical()
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{
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PauseHPATimer();
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//ets_intr_lock();
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}
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void ExitCritical()
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void ICACHE_FLASH_ATTR ExitCritical()
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{
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//ets_intr_unlock();
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ContinueHPATimer();
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}
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/*==============================================================================
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* Partition Map Data
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*============================================================================*/
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#define SYSTEM_PARTITION_OTA_SIZE_OPT2 0x6A000
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#define SYSTEM_PARTITION_OTA_2_ADDR_OPT2 0x81000
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#define SYSTEM_PARTITION_RF_CAL_ADDR_OPT2 0xfb000
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#define SYSTEM_PARTITION_PHY_DATA_ADDR_OPT2 0xfc000
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#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT2 0xfd000
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#define SYSTEM_PARTITION_CUSTOMER_PRIV_PARAM_ADDR_OPT2 0x7c000
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#define SPI_FLASH_SIZE_MAP_OPT2 2
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#define SYSTEM_PARTITION_OTA_SIZE_OPT3 0x6A000
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#define SYSTEM_PARTITION_OTA_2_ADDR_OPT3 0x81000
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#define SYSTEM_PARTITION_RF_CAL_ADDR_OPT3 0x1fb000
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#define SYSTEM_PARTITION_PHY_DATA_ADDR_OPT3 0x1fc000
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#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT3 0x1fd000
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#define SYSTEM_PARTITION_CUSTOMER_PRIV_PARAM_ADDR_OPT3 0x7c000
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#define SPI_FLASH_SIZE_MAP_OPT3 3
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#define SYSTEM_PARTITION_OTA_SIZE_OPT4 0x6A000
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#define SYSTEM_PARTITION_OTA_2_ADDR_OPT4 0x81000
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#define SYSTEM_PARTITION_RF_CAL_ADDR_OPT4 0x3fb000
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#define SYSTEM_PARTITION_PHY_DATA_ADDR_OPT4 0x3fc000
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#define SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT4 0x3fd000
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#define SYSTEM_PARTITION_CUSTOMER_PRIV_PARAM_ADDR_OPT4 0x7c000
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#define SPI_FLASH_SIZE_MAP_OPT4 4
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#define SYSTEM_PARTITION_CUSTOMER_PRIV_PARAM SYSTEM_PARTITION_CUSTOMER_BEGIN
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#define EAGLE_FLASH_BIN_ADDR SYSTEM_PARTITION_CUSTOMER_BEGIN + 1
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#define EAGLE_IROM0TEXT_BIN_ADDR SYSTEM_PARTITION_CUSTOMER_BEGIN + 2
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static const partition_item_t partition_table_opt2[] =
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{
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{ EAGLE_FLASH_BIN_ADDR, 0x00000, 0x10000},
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{ EAGLE_IROM0TEXT_BIN_ADDR, 0x10000, 0x60000},
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{ SYSTEM_PARTITION_RF_CAL, SYSTEM_PARTITION_RF_CAL_ADDR_OPT2, 0x1000},
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{ SYSTEM_PARTITION_PHY_DATA, SYSTEM_PARTITION_PHY_DATA_ADDR_OPT2, 0x1000},
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{ SYSTEM_PARTITION_SYSTEM_PARAMETER, SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT2, 0x3000},
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};
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static const partition_item_t partition_table_opt3[] =
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{
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{ EAGLE_FLASH_BIN_ADDR, 0x00000, 0x10000},
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{ EAGLE_IROM0TEXT_BIN_ADDR, 0x10000, 0x60000},
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{ SYSTEM_PARTITION_RF_CAL, SYSTEM_PARTITION_RF_CAL_ADDR_OPT3, 0x1000},
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{ SYSTEM_PARTITION_PHY_DATA, SYSTEM_PARTITION_PHY_DATA_ADDR_OPT3, 0x1000},
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{ SYSTEM_PARTITION_SYSTEM_PARAMETER, SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT3, 0x3000},
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};
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static const partition_item_t partition_table_opt4[] =
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{
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{ EAGLE_FLASH_BIN_ADDR, 0x00000, 0x10000},
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{ EAGLE_IROM0TEXT_BIN_ADDR, 0x10000, 0x60000},
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{ SYSTEM_PARTITION_RF_CAL, SYSTEM_PARTITION_RF_CAL_ADDR_OPT4, 0x1000},
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{ SYSTEM_PARTITION_PHY_DATA, SYSTEM_PARTITION_PHY_DATA_ADDR_OPT4, 0x1000},
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{ SYSTEM_PARTITION_SYSTEM_PARAMETER, SYSTEM_PARTITION_SYSTEM_PARAMETER_ADDR_OPT4, 0x3000},
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};
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/**
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* This is called on boot for versions ESP8266_NONOS_SDK_v1.5.2 to
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* ESP8266_NONOS_SDK_v2.2.1. system_phy_set_rfoption() may be called here
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*/
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void user_rf_pre_init(void)
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{
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; // nothing
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}
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/**
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* Required function as of ESP8266_NONOS_SDK_v3.0.0. Must call
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* system_partition_table_regist(). This tries to register a few different
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* partition maps. The ESP should be happy with one of them.
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*/
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void ICACHE_FLASH_ATTR user_pre_init(void)
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{
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if(system_partition_table_regist(
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partition_table_opt2,
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sizeof(partition_table_opt2) / sizeof(partition_table_opt2[0]),
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SPI_FLASH_SIZE_MAP_OPT2))
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{
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os_printf("system_partition_table_regist 2 success!!\r\n");
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}
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else if(system_partition_table_regist(
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partition_table_opt4,
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sizeof(partition_table_opt4) / sizeof(partition_table_opt4[0]),
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SPI_FLASH_SIZE_MAP_OPT4))
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{
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os_printf("system_partition_table_regist 4 success!!\r\n");
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}
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else if(system_partition_table_regist(
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partition_table_opt3,
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sizeof(partition_table_opt3) / sizeof(partition_table_opt3[0]),
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SPI_FLASH_SIZE_MAP_OPT3))
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{
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os_printf("system_partition_table_regist 3 success!!\r\n");
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}
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else
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{
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os_printf("system_partition_table_regist all fail\r\n");
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while(1);
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}
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}
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