From 5427a810ae590eb60febc40d31b1d65e84299971 Mon Sep 17 00:00:00 2001 From: Charles Lohr Date: Sat, 13 Aug 2016 14:13:46 -0400 Subject: [PATCH] Add some hardware --- embedded8266/hardware/NOTES.txt | 5 + .../hardware/esp12e-generics-F_Cu.png | Bin 0 -> 20323 bytes embedded8266/hardware/esp12e-generics-F_Cu.ps | 3094 ++++++++++ .../hardware/esp12e-generics-cache.lib | 158 + .../hardware/esp12e-generics.kicad_pcb | 867 +++ embedded8266/hardware/esp12e-generics.net | 206 + embedded8266/hardware/esp12e-generics.pro | 282 + embedded8266/hardware/esp12e-generics.sch | 438 ++ embedded8266/hardware/esp_onelayer3-F_Cu.png | Bin 0 -> 63141 bytes embedded8266/hardware/esp_onelayer3-F_Cu.ps | 5435 +++++++++++++++++ embedded8266/hardware/esp_onelayer3-cache.lib | 215 + embedded8266/hardware/esp_onelayer3.kicad_pcb | 1884 ++++++ embedded8266/hardware/esp_onelayer3.net | 478 ++ embedded8266/hardware/esp_onelayer3.pro | 142 + embedded8266/hardware/esp_onelayer3.sch | 1057 ++++ 15 files changed, 14261 insertions(+) create mode 100644 embedded8266/hardware/NOTES.txt create mode 100644 embedded8266/hardware/esp12e-generics-F_Cu.png create mode 100644 embedded8266/hardware/esp12e-generics-F_Cu.ps create mode 100644 embedded8266/hardware/esp12e-generics-cache.lib create mode 100644 embedded8266/hardware/esp12e-generics.kicad_pcb create mode 100644 embedded8266/hardware/esp12e-generics.net create mode 100644 embedded8266/hardware/esp12e-generics.pro create mode 100644 embedded8266/hardware/esp12e-generics.sch create mode 100644 embedded8266/hardware/esp_onelayer3-F_Cu.png create mode 100644 embedded8266/hardware/esp_onelayer3-F_Cu.ps create mode 100644 embedded8266/hardware/esp_onelayer3-cache.lib create mode 100644 embedded8266/hardware/esp_onelayer3.kicad_pcb create mode 100644 embedded8266/hardware/esp_onelayer3.net create mode 100644 embedded8266/hardware/esp_onelayer3.pro create mode 100644 embedded8266/hardware/esp_onelayer3.sch diff --git a/embedded8266/hardware/NOTES.txt b/embedded8266/hardware/NOTES.txt new file mode 100644 index 0000000..1f06337 --- /dev/null +++ b/embedded8266/hardware/NOTES.txt @@ -0,0 +1,5 @@ +These were done in Kicad. The libraries used are in the -cache files. Please use the -cache's otherwise you can run into a lot of problems. + +I do not have a colorchord-specific design for the ESP-12E. I have included the generics file. + +The esp_onelayer3 file was what was used in the Saxophone video. A electret microphone was attached between GND and the T0 pin of the ESP. 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0 50 20 0 1 0 N +P 4 0 1 0 0 0 0 30 0 30 0 30 N +ENDDRAW +ENDDEF +# +# AP1117 +# +DEF AP1117 U 0 40 Y Y 1 F N +F0 "U" 0 200 60 H V C CNN +F1 "AP1117" 0 -200 60 H V C CNN +F2 "~" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN +DRAW +S -250 150 250 -150 0 1 0 f +X GND 1 550 -100 300 L 50 50 1 1 B +X Vout 2 550 0 300 L 50 50 1 1 B +X Vin 3 550 100 300 L 50 50 1 1 B +X Vout2 4 -550 0 300 R 50 50 1 1 B +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 0 100 40 H V L CNN +F1 "C" 6 -85 40 H V L CNN +F2 "~" 38 -150 30 H V C CNN +F3 "~" 0 0 60 H V C CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CONN_8 +# +DEF CONN_8 P 0 40 Y N 1 F N +F0 "P" -50 0 60 V V C CNN +F1 "CONN_8" 50 0 60 V V C CNN +F2 "~" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN +DRAW +S -100 400 100 -400 0 1 0 N +X P1 1 -350 350 250 R 50 50 1 1 P I +X P2 2 -350 250 250 R 50 50 1 1 P I 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+DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +#End Library diff --git a/embedded8266/hardware/esp12e-generics.kicad_pcb b/embedded8266/hardware/esp12e-generics.kicad_pcb new file mode 100644 index 0000000..5c3e031 --- /dev/null +++ b/embedded8266/hardware/esp12e-generics.kicad_pcb @@ -0,0 +1,867 @@ +(kicad_pcb (version 3) (host pcbnew "(2013-jul-07)-stable") + + (general + (links 26) + (no_connects 0) + (area 64.440999 32.882999 95.88627 62.559001) + (thickness 1.6) + (drawings 12) + (tracks 88) + (zones 0) + (modules 6) + (nets 11) + ) + + (page User 139.7 139.7) + (layers + (15 F.Cu signal) + (0 B.Cu signal) + (16 B.Adhes user) + (17 F.Adhes user) + (18 B.Paste user) + (19 F.Paste user) + (20 B.SilkS user) + (21 F.SilkS user) + (22 B.Mask user) + (23 F.Mask user) + (24 Dwgs.User user) + (25 Cmts.User user) + (26 Eco1.User user) + (27 Eco2.User user) + (28 Edge.Cuts user) + ) + + (setup + (last_trace_width 0.381) + (trace_clearance 0.381) + (zone_clearance 0.3556) + (zone_45_only no) + (trace_min 0.254) + (segment_width 0.2) + (edge_width 0.15) + (via_size 0.889) + (via_drill 0.635) + (via_min_size 0.889) + (via_min_drill 0.508) + (uvia_size 0.508) + (uvia_drill 0.127) + (uvias_allowed no) + (uvia_min_size 0.508) + (uvia_min_drill 0.127) + (pcb_text_width 0.2032) + (pcb_text_size 0.889 0.889) + (mod_edge_width 0.15) + (mod_text_size 1.5 1.5) + (mod_text_width 0.15) + (pad_size 1.524 1.524) + (pad_drill 0.762) + (pad_to_mask_clearance 0.2) + (aux_axis_origin 0 0) + (visible_elements FFFFFFBF) + (pcbplotparams + (layerselection 32768) + (usegerberextensions false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 2) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotothertext true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 2) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "")) + ) + + (net 0 "") + (net 1 +3.3V) + (net 2 +5V) + (net 3 GND) + (net 4 GPIO0) + (net 5 GPIO2) + (net 6 GPIO4) + (net 7 GPIO5) + (net 8 N-000003) + (net 9 RX) + (net 10 TX) + + (net_class Default "This is the default net class." + (clearance 0.381) + (trace_width 0.381) + (via_dia 0.889) + (via_drill 0.635) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net "") + (add_net +3.3V) + (add_net +5V) + (add_net GND) + (add_net GPIO0) + (add_net GPIO2) + (add_net GPIO4) + (add_net GPIO5) + (add_net N-000003) + (add_net RX) + (add_net TX) + ) + + (module SM0805 (layer F.Cu) (tedit 56195079) (tstamp 56194CC7) + (at 90.4748 60.9092 180) + (path /56194F36) + (attr smd) + (fp_text reference C1 (at 2.5908 -0.0508 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10u (at 2.5908 0.4572 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) + (layers F.Cu F.Paste F.Mask) + (net 2 +5V) + ) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0805 (layer F.Cu) (tedit 56195074) (tstamp 56194CD4) + (at 82.8802 59.3344) + (path /56194F45) + (attr smd) + (fp_text reference C2 (at -0.0762 -1.4224) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10u (at -2.6162 1.1176) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SIL-8 (layer F.Cu) (tedit 56C7A81F) (tstamp 56194CE5) + (at 93.98 51.816 270) + (descr "Connecteur 8 pins") + (tags "CONN DEV") + (path /56194CDB) + (fp_text reference P1 (at -6.604 -0.508 270) (layer F.SilkS) + (effects (font (size 1.72974 1.08712) (thickness 0.3048))) + ) + (fp_text value CONN_8 (at 0.1524 1.6256 270) (layer F.SilkS) + (effects (font (size 1.524 1.016) (thickness 0.3048))) + ) + (fp_line (start -10.16 -1.27) (end 10.16 -1.27) (layer F.SilkS) (width 0.3048)) + (fp_line (start 10.16 -1.27) (end 10.16 1.27) (layer F.SilkS) (width 0.3048)) + (fp_line (start 10.16 1.27) (end -10.16 1.27) (layer F.SilkS) (width 0.3048)) + (fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048)) + (fp_line (start -7.62 1.27) (end -7.62 -1.27) (layer F.SilkS) (width 0.3048)) + (pad 1 thru_hole rect (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128) + (layers *.Cu *.Mask F.SilkS) + (net 10 TX) + ) + (pad 2 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128) + (layers *.Cu *.Mask F.SilkS) + (net 9 RX) + ) + (pad 3 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128) + (layers *.Cu *.Mask F.SilkS) + (net 7 GPIO5) + ) + (pad 4 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128) + (layers *.Cu *.Mask F.SilkS) + (net 6 GPIO4) + ) + (pad 5 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128) + (layers *.Cu *.Mask F.SilkS) + (net 4 GPIO0) + ) + (pad 6 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128) + (layers *.Cu *.Mask F.SilkS) + (net 5 GPIO2) + ) + (pad 7 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128) + (layers *.Cu *.Mask F.SilkS) + (net 3 GND) + ) + (pad 8 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128) + (layers *.Cu *.Mask F.SilkS) + (net 2 +5V) + ) + ) + + (module EXB-A (layer F.Cu) (tedit 52D0B57E) (tstamp 56197883) + (at 88.75776 47.31258) + (path /56194CEA) + (fp_text reference U2 (at 0 -3.81) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.1905))) + ) + (fp_text value EXB-A (at 0.254 3.81) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.1905))) + ) + (pad 1 smd rect (at -1.778 -2.54 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + (net 7 GPIO5) + ) + (pad 2 smd rect (at -1.778 -1.27 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + (net 6 GPIO4) + ) + (pad 3 smd rect (at -1.778 0 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + (net 4 GPIO0) + ) + (pad 4 smd rect (at -1.778 1.27 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + (net 5 GPIO2) + ) + (pad 5 smd rect (at -1.778 2.54 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + (net 8 N-000003) + ) + (pad 6 smd rect (at 1.778 2.54 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + (net 5 GPIO2) + ) + (pad 7 smd rect (at 1.778 1.27 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + (net 4 GPIO0) + ) + (pad 8 smd rect (at 1.778 0 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + (net 6 GPIO4) + ) + (pad 9 smd rect (at 1.778 -1.27 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + (net 7 GPIO5) + ) + (pad 10 smd rect (at 1.778 -2.54 90) (size 0.8001 1.6002) + (layers F.Cu F.Paste F.Mask) + ) + ) + + (module ESP12E (layer F.Cu) (tedit 560D9068) (tstamp 56194D17) + (at 74.6633 45.339) + (path /5619493D) + (fp_text reference ESP1 (at -3 -3) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value ESP12E (at 4 -3) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0 -1) (end -1 0) (layer F.SilkS) (width 0.15)) + (fp_line (start 0 -1) (end 1 0) (layer F.SilkS) (width 0.15)) + (fp_line (start 0 -1) (end 0 3) (layer F.SilkS) (width 0.15)) + (fp_line (start -8 12) (end -8 -4) (layer F.SilkS) (width 0.15)) + (fp_line (start -8 -4) (end 8 -4) (layer F.SilkS) (width 0.15)) + (fp_line (start 8 -4) (end 8 12) (layer F.SilkS) (width 0.15)) + (fp_line (start 8 -12) (end -8 -12) (layer Dwgs.User) (width 0.15)) + (fp_line (start -8 -12) (end -8 12) (layer Dwgs.User) (width 0.15)) + (fp_line (start -8 12) (end 8 12) (layer F.SilkS) (width 0.15)) + (fp_line (start 8 12) (end 8 -12) (layer Dwgs.User) (width 0.15)) + (pad 1 smd oval (at -8 -3) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 2 smd oval (at -8 -1) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 3 smd oval (at -8 1) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 4 smd oval (at -8 3) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 5 smd oval (at -8 5) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 6 smd oval (at -8 7) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 7 smd oval (at -8 9) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 8 smd oval (at -8 11) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 9 smd oval (at -5 12 90) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 10 smd oval (at -3 12 90) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 11 smd oval (at -1 12 90) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 12 smd oval (at 1 12 90) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 13 smd oval (at 3 12 90) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 14 smd oval (at 5 12 90) (size 3 1) + (layers F.Cu F.Paste F.Mask) + ) + (pad 15 smd oval (at 8 11 180) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (pad 16 smd oval (at 8 9 180) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (pad 17 smd oval (at 8 7 180) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 5 GPIO2) + ) + (pad 18 smd oval (at 8 5 180) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 4 GPIO0) + ) + (pad 19 smd oval (at 8 3 180) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 6 GPIO4) + ) + (pad 20 smd oval (at 8 1 180) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 7 GPIO5) + ) + (pad 21 smd oval (at 8 -1 180) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 9 RX) + ) + (pad 22 smd oval (at 8 -3 180) (size 3 1) + (layers F.Cu F.Paste F.Mask) + (net 10 TX) + ) + ) + + (module SOT223 (layer F.Cu) (tedit 200000) (tstamp 561976D8) + (at 88.3412 55.4482) + (descr "module CMS SOT223 4 pins") + (tags "CMS SOT") + (path /5619494C) + (attr smd) + (fp_text reference U1 (at 0 -0.762) (layer F.SilkS) + (effects (font (size 1.016 1.016) (thickness 0.2032))) + ) + (fp_text value AP1117 (at 0 0.762) (layer F.SilkS) + (effects (font (size 1.016 1.016) (thickness 0.2032))) + ) + (fp_line (start -3.556 1.524) (end -3.556 4.572) (layer F.SilkS) (width 0.2032)) + (fp_line (start -3.556 4.572) (end 3.556 4.572) (layer F.SilkS) (width 0.2032)) + (fp_line (start 3.556 4.572) (end 3.556 1.524) (layer F.SilkS) (width 0.2032)) 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F.Cu) + (effects (font (size 0.889 0.889) (thickness 0.2032))) + ) + (gr_text "(C) <>< 2015 C. Lohr" (at 73.152 60.96) (layer F.Cu) + (effects (font (size 0.889 0.889) (thickness 0.2032))) + ) + (gr_text 10ux2 (at 77.724 54.356) (layer F.Cu) + (effects (font (size 0.889 0.889) (thickness 0.2032))) + ) + (gr_text "-->\n10k EXBA\nResistor\nArray" (at 77.216 47.244) (layer F.Cu) + (effects (font (size 0.889 0.889) (thickness 0.2032))) + ) + (gr_text "ESP8266\nESP-12E" (at 74.676 44.196) (layer F.Cu) + (effects (font (size 0.889 0.889) (thickness 0.2032))) + ) + (gr_text AP1117 (at 88.392 54.864) (layer F.Cu) + (effects (font (size 0.889 0.889) (thickness 0.2032))) + ) + (gr_line (start 64.516 41.148) (end 95.504 41.148) (angle 90) (layer Edge.Cuts) (width 0.15)) + (gr_line (start 64.516 62.484) (end 64.516 41.148) (angle 90) (layer Edge.Cuts) (width 0.15)) + (gr_line (start 65.024 62.484) (end 64.516 62.484) (angle 90) (layer Edge.Cuts) (width 0.15)) + (gr_line (start 65.532 62.484) (end 65.024 62.484) (angle 90) (layer Edge.Cuts) (width 0.15)) + (gr_line (start 95.504 62.484) (end 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(lib avr_usb_3v3-cache) (part AP1117)) + (sheetpath (names /) (tstamps /)) + (tstamp 5619494C)) + (comp (ref P1) + (value CONN_8) + (footprint SIL-8) + (libsource (lib conn) (part CONN_8)) + (sheetpath (names /) (tstamps /)) + (tstamp 56194CDB)) + (comp (ref U2) + (value EXB-A) + (footprint EXB-A) + (libsource (lib exb-a) (part EXB-A)) + (sheetpath (names /) (tstamps /)) + (tstamp 56194CEA)) + (comp (ref C1) + (value 10u) + (footprint SM0805) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 56194F36)) + (comp (ref C2) + (value 10u) + (footprint SM0805) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 56194F45))) + (libparts + (libpart (lib device) (part C) + (description "Condensateur non polarise") + (footprints + (fp SM*) + (fp C?) + (fp C1-1)) + (fields + (field (name Reference) C) + (field (name Value) C) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib conn) (part CONN_8) + (description "Symbole general de connecteur") + (fields + (field (name Reference) P) + (field (name Value) CONN_8)) + (pins + (pin (num 1) (name P1) (type passive)) + (pin (num 2) (name P2) (type passive)) + (pin (num 3) (name P3) (type passive)) + (pin (num 4) (name P4) (type passive)) + (pin (num 5) (name P5) (type passive)) + (pin (num 6) (name P6) (type passive)) + (pin (num 7) (name P7) (type passive)) + (pin (num 8) (name P8) (type passive)))) + (libpart (lib esp12e) (part ESP12E) + (fields + (field (name Reference) ESP) + (field (name Value) ESP12E) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name REST) (type input)) + (pin (num 2) (name ADC) (type input)) + (pin (num 3) (name CH_PD) (type input)) + (pin (num 4) (name GPIO16) (type input)) + (pin (num 5) (name GPIO14) (type input)) + (pin (num 6) (name GPIO12) (type input)) + (pin (num 7) (name GPIO13) (type input)) + (pin (num 8) (name VCC) (type input)) + (pin (num 9) (name MTDO) (type input)) + (pin (num 10) (name MTDI) (type input)) + (pin (num 11) (name SD_3) (type input)) + (pin (num 12) (name MTMS) (type input)) + (pin (num 13) (name MTCK) (type input)) + (pin (num 14) (name SD_2) (type input)) + (pin (num 15) (name GND) (type input)) + (pin (num 16) (name GPIO15) (type input)) + (pin (num 17) (name GPIO2) (type input)) + (pin (num 18) (name GPIO0) (type input)) + (pin (num 19) (name GPIO4) (type input)) + (pin (num 20) (name GPIO5) (type input)) + (pin (num 21) (name RXD) (type input)) + (pin (num 22) (name TXD) (type input)))) + (libpart (lib avr_usb_3v3-cache) (part AP1117) + (fields + (field (name Reference) U) + (field (name Value) AP1117)) + (pins + (pin (num 1) (name GND) (type BiDi)) + (pin (num 2) (name Vout) (type BiDi)) + (pin (num 3) (name Vin) (type BiDi)) + (pin (num 4) (name Vout2) (type BiDi)))) + (libpart (lib exb-a) (part EXB-A) + (fields + (field (name Reference) U) + (field (name Value) EXB-A)) + (pins + (pin (num 1) (name R1) (type BiDi)) + (pin (num 2) (name R2) (type BiDi)) + (pin (num 3) (name R3) (type BiDi)) + (pin (num 4) (name R4) (type BiDi)) + (pin (num 5) (name C) (type BiDi)) + (pin (num 6) (name R5) (type BiDi)) + (pin (num 7) (name R6) (type BiDi)) + (pin (num 8) (name R7) (type BiDi)) + (pin (num 9) (name R8) (type BiDi)) + (pin (num 10) (name C) (type BiDi))))) + (libraries + (library (logical device) + (uri /usr/share/kicad/library/device.lib)) + (library (logical conn) + (uri /usr/share/kicad/library/conn.lib)) + (library (logical esp12e) + (uri /home/cnlohr/electrical/kicad/esp12e.lib)) + (library (logical avr_usb_3v3-cache) + (uri /home/cnlohr/electrical/kicad/avr_usb_3v3-cache.lib)) + (library (logical exb-a) + (uri /home/cnlohr/electrical/kicad/exb-a.lib))) + (nets + (net (code 1) (name +3.3V) + (node (ref U1) (pin 2)) + (node (ref ESP1) (pin 3)) + (node (ref ESP1) (pin 8)) + (node (ref ESP1) (pin 1)) + (node (ref C2) (pin 1))) + (net (code 2) (name GND) + (node (ref ESP1) (pin 16)) + (node (ref U1) (pin 1)) + (node (ref ESP1) (pin 15)) + (node (ref P1) (pin 7)) + (node (ref C2) (pin 2)) + (node (ref C1) (pin 2))) + (net (code 3) (name "") + (node (ref U2) (pin 5)) + (node (ref U1) (pin 4))) + (net (code 4) (name +5V) + (node (ref C1) (pin 1)) + (node (ref P1) (pin 8)) + (node (ref U1) (pin 3))) + (net (code 5) (name GPIO2) + (node (ref U2) (pin 4)) + (node (ref U2) (pin 6)) + (node (ref P1) (pin 6)) + (node (ref ESP1) (pin 17))) + (net (code 6) (name RX) + (node (ref P1) (pin 2)) + (node (ref ESP1) (pin 21))) + (net (code 7) (name TX) + (node (ref ESP1) (pin 22)) + (node (ref P1) (pin 1))) + (net (code 8) (name GPIO0) + (node (ref U2) (pin 7)) + (node (ref U2) (pin 3)) + (node (ref P1) (pin 5)) + (node (ref ESP1) (pin 18))) + (net (code 9) (name GPIO4) + (node (ref U2) (pin 8)) + (node (ref U2) (pin 2)) + (node (ref ESP1) (pin 19)) + (node (ref P1) (pin 4))) + (net (code 10) (name GPIO5) + (node (ref P1) (pin 3)) + (node (ref U2) (pin 1)) + (node (ref U2) (pin 9)) + (node (ref ESP1) (pin 20))) + (net (code 11) (name "") + (node (ref ESP1) (pin 10))) + (net (code 12) (name "") + (node (ref ESP1) (pin 2))) + (net (code 13) (name "") + (node (ref ESP1) (pin 4))) + (net (code 14) (name "") + (node (ref ESP1) (pin 5))) + (net (code 15) (name "") + (node (ref ESP1) (pin 6))) + (net (code 16) (name "") + (node (ref ESP1) (pin 7))) + (net (code 17) (name "") + (node (ref ESP1) (pin 9))) + (net (code 18) (name "") + (node (ref ESP1) (pin 11))) + (net (code 19) (name "") + (node (ref ESP1) (pin 12))) + (net (code 20) (name "") + (node (ref ESP1) (pin 13))) + (net (code 21) (name "") + (node (ref ESP1) (pin 14))) + (net (code 22) (name "") + (node (ref U2) (pin 10))))) \ No newline at end of file diff --git a/embedded8266/hardware/esp12e-generics.pro b/embedded8266/hardware/esp12e-generics.pro new file mode 100644 index 0000000..f557504 --- /dev/null +++ b/embedded8266/hardware/esp12e-generics.pro @@ -0,0 +1,282 @@ +update=Sat 10 Oct 2015 01:37:02 PM EDT +last_client=pcbnew +[eeschema] +version=1 +LibDir= +NetFmtName= +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=/home/cnlohr/electrical/kicad/esp12e +LibName32=/home/cnlohr/electrical/kicad/l6470 +LibName33=/home/cnlohr/electrical/kicad/l6470-powerso36 +LibName34=/home/cnlohr/electrical/kicad/lvt-816s +LibName35=/home/cnlohr/electrical/kicad/lis3mdl +LibName36=/home/cnlohr/electrical/kicad/flipflop-sn74lvc1g175 +LibName37=/home/cnlohr/electrical/kicad/ak5358b +LibName38=/home/cnlohr/electrical/kicad/opamp_mcp6001t +LibName39=/home/cnlohr/electrical/kicad/jfet-n_sot-23 +LibName40=/home/cnlohr/electrical/kicad/tvs-bidirection +LibName41=/home/cnlohr/electrical/kicad/pcb_bom +LibName42=/home/cnlohr/electrical/kicad/avr_usb_3v3-cache +LibName43=/home/cnlohr/electrical/kicad/lsm303d +LibName44=/home/cnlohr/electrical/kicad/a4447sljtr +LibName45=/home/cnlohr/electrical/kicad/mfrc522 +LibName46=/home/cnlohr/electrical/kicad/zener-sot23-3 +LibName47=/home/cnlohr/electrical/kicad/mcp1824_ct +LibName48=/home/cnlohr/electrical/kicad/halleffect-tcs20dlr +LibName49=/home/cnlohr/electrical/kicad/atmegaxu2 +LibName50=/home/cnlohr/electrical/kicad/attinyx4 +LibName51=/home/cnlohr/electrical/kicad/ltv-846s +LibName52=/home/cnlohr/electrical/kicad/esp8266-wi07-6 +LibName53=/home/cnlohr/electrical/kicad/BELFuse_Ethernet +LibName54=/home/cnlohr/electrical/kicad/mmpq2907a +LibName55=/home/cnlohr/electrical/kicad/avr6pin +LibName56=/home/cnlohr/electrical/kicad/lsm303c +LibName57=/home/cnlohr/electrical/kicad/photomos +LibName58=/home/cnlohr/electrical/kicad/enc424j600 +LibName59=/home/cnlohr/electrical/kicad/5050RGB +LibName60=/home/cnlohr/electrical/kicad/4427 +LibName61=/home/cnlohr/electrical/kicad/7805to220 +LibName62=/home/cnlohr/electrical/kicad/rn-cay16-f4 +LibName63=/home/cnlohr/electrical/kicad/exb-a +LibName64=/home/cnlohr/electrical/kicad/2.4GHZ_2450FB15L0001 +LibName65=/home/cnlohr/electrical/kicad/opa832 +LibName66=/home/cnlohr/electrical/kicad/max31855 +LibName67=/home/cnlohr/electrical/kicad/rs485-isl3170 +LibName68=/home/cnlohr/electrical/kicad/6multi +LibName69=/home/cnlohr/electrical/kicad/ap1117 +LibName70=/home/cnlohr/electrical/kicad/microsd_1050270001 +LibName71=/home/cnlohr/electrical/kicad/network0606 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60 H V C CNN +F3 "~" 0 0 60 H V C CNN +ALIAS +3,3V +DRAW +X +3.3V 1 0 0 0 U 30 30 0 0 W N +C 0 60 20 0 1 0 N +P 3 0 1 0 0 0 0 40 0 40 N +ENDDRAW +ENDDEF +# +# +5V +# +DEF +5V #PWR 0 40 Y Y 1 F P +F0 "#PWR" 0 90 20 H I C CNN +F1 "+5V" 0 90 30 H V C CNN +F2 "~" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN +DRAW +X +5V 1 0 0 0 U 20 20 0 0 W N +C 0 50 20 0 1 0 N +P 4 0 1 0 0 0 0 30 0 30 0 30 N +ENDDRAW +ENDDEF +# +# 25Q40B +# +DEF 25Q40B U 0 40 Y Y 1 F N +F0 "U" -350 400 60 H V C CNN +F1 "25Q40B" -350 300 60 H V C CNN +F2 "~" -150 0 60 H V C CNN +F3 "~" -150 0 60 H V C CNN +DRAW +S -400 200 400 -200 0 1 0 f +X ~CS 1 -700 150 300 R 50 50 1 1 I +X DO/IO1 2 -700 50 300 R 50 50 1 1 I +X ~WP~/IO2 3 -700 -50 300 R 50 50 1 1 I +X GND 4 -700 -150 300 R 50 50 1 1 I +X DI/IO0 5 700 -150 300 L 50 50 1 1 I +X CLK 6 700 -50 300 L 50 50 1 1 I +X ~HOLD~/IO3 7 700 50 300 L 50 50 1 1 I +X VCC 8 700 150 300 L 50 50 1 1 I +X GND 9 -50 -300 300 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# AP1117 +# +DEF AP1117 U 0 40 Y Y 1 F N +F0 "U" 0 200 60 H V C CNN +F1 "AP1117" 0 -200 60 H V C CNN +F2 "~" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN +DRAW +S -250 150 250 -150 0 1 0 f +X GND 1 550 -100 300 L 50 50 1 1 B +X Vout 2 550 0 300 L 50 50 1 1 B +X Vin 3 550 100 300 L 50 50 1 1 B +X Vout2 4 -550 0 300 R 50 50 1 1 B +ENDDRAW +ENDDEF +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 0 100 40 H V L CNN +F1 "C" 6 -85 40 H V L CNN +F2 "~" 38 -150 30 H V C CNN +F3 "~" 0 0 60 H V C CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# CONN_1 +# +DEF ~CONN_1 P 0 30 N N 1 F N +F0 "P" 80 0 40 H V L CNN +F1 "CONN_1" 0 55 30 H I C CNN +F2 "~" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN +DRAW +C 0 0 31 0 1 0 N +P 2 0 1 0 -30 0 -50 0 N +X 1 1 -150 0 100 R 60 60 1 1 P +ENDDRAW +ENDDEF +# +# CONN_2 +# +DEF CONN_2 P 0 40 Y N 1 F N +F0 "P" -50 0 40 V V C CNN +F1 "CONN_2" 50 0 40 V V C CNN +F2 "~" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN +DRAW +S -100 150 100 -150 0 1 0 N +X P1 1 -350 100 250 R 60 60 1 1 P I +X PM 2 -350 -100 250 R 60 60 1 1 P I +ENDDRAW +ENDDEF +# +# ESP8266EX +# +DEF ESP8266EX U 0 40 Y Y 1 F N +F0 "U" -900 700 60 H V C CNN +F1 "ESP8266EX" -850 600 60 H V C CNN +F2 "~" -900 700 60 H V C CNN +F3 "~" -900 700 60 H V C CNN +DRAW +S -850 500 700 -500 0 1 0 f +X VddA 1 -1150 350 300 R 50 50 1 1 I +X LNA/ANT 2 -1150 250 300 R 50 50 1 1 I +X Vdd3P3 3 -1150 150 300 R 50 50 1 1 I +X Vdd3P3 4 -1150 50 300 R 50 50 1 1 I +X VddRCT 5 -1150 -50 300 R 50 50 1 1 I +X TOUT 6 -1150 -150 300 R 50 50 1 1 I +X CHIP_EN 7 -1150 -250 300 R 50 50 1 1 I +X XPD_DCDC 8 -1150 -350 300 R 50 50 1 1 I +X MTMS/GPIO14 9 -350 -800 300 U 50 50 1 1 I +X MTDI/GPIO12 10 -250 -800 300 U 50 50 1 1 I +X SD_CMD 20 1000 -50 300 L 50 50 1 1 I +X VDDA 30 -150 800 300 D 50 50 1 1 I +X VddPST 11 -150 -800 300 U 50 50 1 1 I +X SD_CLK 21 1000 50 300 L 50 50 1 1 I +X RES12K 31 -250 800 300 D 50 50 1 1 I +X MTCK/GPIO13 12 -50 -800 300 U 50 50 1 1 I +X SD_D0 22 1000 150 300 L 50 50 1 1 I +X EXT_RSTB 32 -350 800 300 D 50 50 1 1 I +X MTDO/GPIO15 13 50 -800 300 U 50 50 1 1 I +X SD_D1 23 1000 250 300 L 50 50 1 1 I +X GND 33 -450 800 300 D 50 50 1 1 I +X GPIO2 14 150 -800 300 U 50 50 1 1 I +X GP5/VD 24 1000 350 300 L 50 50 1 1 I +X GPIO0 15 250 -800 300 U 50 50 1 1 I +X URXD 25 350 800 300 D 50 50 1 1 I +X GP4/VD 16 350 -800 300 U 50 50 1 1 I +X UTXD 26 250 800 300 D 50 50 1 1 I +X VddPST 17 1000 -350 300 L 50 50 1 1 I +X XTAL_OUT 27 150 800 300 D 50 50 1 1 I +X SD_D2 18 1000 -250 300 L 50 50 1 1 I +X XTAL_IN 28 50 800 300 D 50 50 1 1 I +X SD_D3 19 1000 -150 300 L 50 50 1 1 I +X VDDD 29 -50 800 300 D 50 50 1 1 I +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +F2 "~" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 40 V V C CNN +F1 "R" 7 1 40 V V C CNN +F2 "~" -70 0 30 V V C CNN +F3 "~" 0 0 30 H V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* + SM1206 +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# XTAL4P +# +DEF XTAL4P X 0 40 N N 1 F N +F0 "X" 0 150 60 H V C CNN +F1 "XTAL4P" 0 -150 60 H V C CNN +F2 "~" 0 0 60 H V C CNN +F3 "~" 0 0 60 H V C CNN +DRAW +P 2 0 1 16 -100 100 -100 -100 N +P 2 0 1 16 100 100 100 -100 N +P 5 0 1 12 -50 50 50 50 50 -50 -50 -50 -50 50 f +X 1 1 -300 0 200 R 40 40 1 1 P +X 2 2 300 0 200 L 40 40 1 1 P +X GND 3 -50 -300 300 U 50 50 1 1 P +X GND 4 50 -300 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/embedded8266/hardware/esp_onelayer3.kicad_pcb b/embedded8266/hardware/esp_onelayer3.kicad_pcb new file mode 100644 index 0000000..8180d08 --- /dev/null +++ b/embedded8266/hardware/esp_onelayer3.kicad_pcb @@ -0,0 +1,1884 @@ +(kicad_pcb (version 3) (host pcbnew "(2013-jul-07)-stable") + + (general + (links 74) + (no_connects 1) + (area 36.253134 30.449999 69.588001 54.550001) + (thickness 1.6) + (drawings 17) + (tracks 514) + (zones 0) + (modules 36) + (nets 25) + ) + + (page User 139.7 139.7) + (layers + (15 F.Cu signal) + (0 B.Cu signal) + (16 B.Adhes user) + (17 F.Adhes user) + (18 B.Paste user) + (19 F.Paste user) + (20 B.SilkS user) + (21 F.SilkS user) + (22 B.Mask user) + (23 F.Mask user) + (24 Dwgs.User user) + (25 Cmts.User user) + (26 Eco1.User user) + (27 Eco2.User user) + (28 Edge.Cuts user) + ) + + (setup + (last_trace_width 0.254) + (trace_clearance 0.2413) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.1778) + (segment_width 0.2) + (edge_width 0.1) + (via_size 0.889) + (via_drill 0.635) + (via_min_size 0.889) + (via_min_drill 0.508) + (uvia_size 0.508) + (uvia_drill 0.127) + (uvias_allowed no) + (uvia_min_size 0.508) + (uvia_min_drill 0.127) + (pcb_text_width 0.3) + (pcb_text_size 0.762 0.762) + (mod_edge_width 0.15) + (mod_text_size 0.762 0.762) + (mod_text_width 0.15) + (pad_size 1.397 1.397) + (pad_drill 0) + (pad_to_mask_clearance 0) + (aux_axis_origin 0 0) + (visible_elements FFFFFFBF) + (pcbplotparams + (layerselection 32768) + (usegerberextensions false) + (excludeedgelayer true) + (linewidth 0.150000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 2) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotothertext true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 2) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "")) + ) + + (net 0 "") + (net 1 +3.3V) + (net 2 +5V) + (net 3 GND) + (net 4 N-000001) + (net 5 N-0000010) + (net 6 N-0000011) + (net 7 N-0000012) + (net 8 N-0000015) + (net 9 N-0000016) + (net 10 N-0000018) + (net 11 N-0000019) + (net 12 N-000002) + (net 13 N-0000020) + (net 14 N-0000021) + (net 15 N-0000023) + (net 16 N-0000024) + (net 17 N-0000025) + (net 18 N-0000026) + (net 19 N-000003) + (net 20 N-000004) + (net 21 N-000005) + (net 22 N-000007) + (net 23 N-000008) + (net 24 N-000009) + + (net_class Default "This is the default net class." + (clearance 0.2413) + (trace_width 0.254) + (via_dia 0.889) + (via_drill 0.635) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net "") + (add_net +3.3V) + (add_net +5V) + (add_net GND) + (add_net N-000001) + (add_net N-0000010) + (add_net N-0000011) + (add_net N-0000012) + (add_net N-0000015) + (add_net N-0000016) + (add_net N-0000018) + (add_net N-0000019) + (add_net N-000002) + (add_net N-0000020) + (add_net N-0000021) + (add_net N-0000023) + (add_net N-0000024) + (add_net N-0000025) + (add_net N-0000026) + (add_net N-000003) + (add_net N-000004) + (add_net N-000005) + (add_net N-000007) + (add_net N-000008) + (add_net N-000009) + ) + + (module SOT223 (layer F.Cu) (tedit 55E49A72) (tstamp 55C8BA8F) + (at 41.8084 44.3484) + (descr "module CMS SOT223 4 pins") + (tags "CMS SOT") + (path /55C8C2C5) + (attr smd) + (fp_text reference U1 (at -4.3923 3.0753) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value AP1117 (at -1.17094 -5.55752) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_line (start -3.556 1.524) (end -3.556 4.572) (layer F.SilkS) (width 0.2032)) + (fp_line (start -3.556 4.572) (end 3.556 4.572) (layer F.SilkS) (width 0.2032)) + (fp_line (start 3.556 4.572) (end 3.556 1.524) (layer F.SilkS) (width 0.2032)) + (fp_line (start -3.556 -1.524) (end -3.556 -2.286) (layer F.SilkS) (width 0.2032)) + (fp_line (start -3.556 -2.286) (end -2.032 -4.572) (layer F.SilkS) (width 0.2032)) + (fp_line (start -2.032 -4.572) (end 2.032 -4.572) (layer F.SilkS) (width 0.2032)) + (fp_line (start 2.032 -4.572) (end 3.556 -2.286) (layer F.SilkS) (width 0.2032)) + (fp_line (start 3.556 -2.286) (end 3.556 -1.524) (layer F.SilkS) (width 0.2032)) + (pad 4 smd rect (at 0 -3.302) (size 3.6576 2.032) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 2 smd rect (at 0 3.302) (size 1.016 2.032) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 3 smd rect (at 2.286 3.302) (size 1.016 2.032) + (layers F.Cu F.Paste F.Mask) + (net 2 +5V) + ) + (pad 1 smd rect (at -2.286 3.302) (size 1.016 2.032) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (model smd/SOT223.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.4 0.4 0.4)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0805 (layer F.Cu) (tedit 55D245F2) (tstamp 55C8BAD7) + (at 46.42104 47.34306 270) + (path /55C8C2DE) + (attr smd) + (fp_text reference C3 (at -1.6667 1.4503 270) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value 10u (at 0.2383 1.5265 270) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) + (layers F.Cu F.Paste F.Mask) + (net 2 +5V) + ) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module QFN32 (layer F.Cu) (tedit 55C8FB8E) (tstamp 55C8BB6A) + (at 53.6586 41.6746) + (descr "Support CMS Plcc 32 pins") + (tags "CMS Plcc") + (path /55C8B6FD) + (attr smd) + (fp_text reference U2 (at -3.4936 -2.9396) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value ESP8266EX (at 0.3164 4.0454) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_line (start -2.0955 -3.048) (end 2.0955 -3.048) (layer F.SilkS) (width 0.1524)) + (fp_line (start 2.0955 -3.048) (end 3.048 -3.048) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.048 -3.048) (end 3.048 3.048) (layer F.SilkS) (width 0.1524)) + (fp_line (start 3.048 3.048) (end -3.048 3.048) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.048 3.048) (end -3.048 -2.0955) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.048 -2.0955) (end -2.0955 -3.048) (layer F.SilkS) (width 0.1524)) + (pad 31 smd rect (at -1.24968 -2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 11 N-0000019) + ) + (pad 30 smd rect (at -0.7493 -2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 29 smd rect (at -0.24892 -2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 32 smd rect (at -1.75006 -2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 1 smd rect (at -2.49936 -1.75006 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 2 smd rect (at -2.49936 -1.24968 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 13 N-0000020) + ) + (pad 3 smd rect (at -2.49936 -0.7493 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 4 smd rect (at -2.49936 -0.24892 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 5 smd rect (at -2.49936 0.24892 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + ) + (pad 6 smd rect (at -2.49936 0.7493 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 9 N-0000016) + ) + (pad 7 smd rect (at -2.49936 1.24968 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 8 smd rect (at -2.49936 1.75006 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (pad 16 smd rect (at 1.75006 2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 4 N-000001) + ) + (pad 9 smd rect (at -1.75006 2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 12 N-000002) + ) + (pad 10 smd rect (at -1.24968 2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 19 N-000003) + ) + (pad 11 smd rect (at -0.7493 2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 12 smd rect (at -0.24892 2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (pad 13 smd rect (at 0.24892 2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 8 N-0000015) + ) + (pad 14 smd rect (at 0.7493 2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 15 N-0000023) + ) + (pad 15 smd rect (at 1.24968 2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 10 N-0000018) + ) + (pad 17 smd rect (at 2.49936 1.75006 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + (pad 18 smd rect (at 2.49936 1.24968 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 20 N-000004) + ) + (pad 19 smd rect (at 2.49936 0.7493 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 6 N-0000011) + ) + (pad 20 smd rect (at 2.49936 0.24892 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 5 N-0000010) + ) + (pad 21 smd rect (at 2.49936 -0.24892 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 22 N-000007) + ) + (pad 22 smd rect (at 2.49936 -0.7493 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 24 N-000009) + ) + (pad 23 smd rect (at 2.49936 -1.24968 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 23 N-000008) + ) + (pad 24 smd rect (at 2.49936 -1.75006 90) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (pad 25 smd rect (at 1.75006 -2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 16 N-0000024) + ) + (pad 26 smd rect (at 1.24968 -2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 21 N-000005) + ) + (pad 27 smd rect (at 0.7493 -2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 17 N-0000025) + ) + (pad 28 smd rect (at 0.24892 -2.49936) (size 0.254 0.762) + (layers F.Cu F.Paste F.Mask) + (net 18 N-0000026) + ) + (pad 33 smd rect (at 0 0) (size 2.99974 2.99974) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + ) + + (module XTAL4P (layer F.Cu) (tedit 55E7685D) (tstamp 55C8BB72) + (at 54.6558 34.9082 180) + (path /55C8B716) + (fp_text reference X1 (at -0.13962 -1.49762 180) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value 26MHz (at 0.8078 2.9042 180) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 4 smd rect (at 0 0 180) (size 1.397 1.1938) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (pad 1 smd rect (at 0 1.7018 180) (size 1.397 1.1938) + (layers F.Cu F.Paste F.Mask) + (net 17 N-0000025) + ) + (pad 3 smd rect (at 2.286 1.7018 180) (size 1.397 1.1938) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + (pad 2 smd rect (at 2.286 0 180) (size 1.397 1.1938) + (layers F.Cu F.Paste F.Mask) + (net 18 N-0000026) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 55C8FB3D) (tstamp 55C8BB77) + (at 49.149 45.17136) + (path /55C8B809) + (fp_text reference P4 (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value GND (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 55C8FB36) (tstamp 55C8BB7C) + (at 63.246 50.673) + (path /55C8B835) + (fp_text reference P5 (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value 5V (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 1 +3.3V) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 5102E01B) (tstamp 55C8BB81) + (at 60.19 35.1) + (path /55C8B83B) + (fp_text reference P3 (at 0 0) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value GND (at 0 0) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 55E7564B) (tstamp 55C8BB86) + (at 49.01946 42.62628 90) + (path /55C8B86A) + (fp_text reference P1 (at 0 0 90) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value MIC (at 1.06934 -1.98882 180) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0 90) (size 1.397 1.397) + (layers F.Cu F.Paste F.Mask) + (net 9 N-0000016) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 55C8FB1C) (tstamp 55C8BB90) + (at 59.61634 49.8729) + (path /55C8B8D4) + (fp_text reference P8 (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value GPIO0 (at -0.1459 3.1216) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 10 N-0000018) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 5102E01B) (tstamp 55C8BB95) + (at 57.2838 36.6523) + (path /55C8B8E6) + (fp_text reference P7 (at 0 0) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value UTX (at 0 0) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 21 N-000005) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 5102E01B) (tstamp 55C8BB9A) + (at 60.093 37.5139) + (path /55C8B8EC) + (fp_text reference P9 (at 0 0) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value URX (at 0 0) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 16 N-0000024) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 55C8FB22) (tstamp 55C8BB9F) + (at 57.14492 49.95672) + (path /55C8B90A) + (fp_text reference P6 (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value GPIO2 (at -0.2391 -1.5268) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 15 N-0000023) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 55E713C7) (tstamp 55C8BBA4) + (at 46.20768 49.8094) + (path /55C8C79F) + (fp_text reference P11 (at 0 0) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value 5V (at 2.05232 0.254 90) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 2 +5V) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 55E48DB3) (tstamp 55C8BBA9) + (at 39.60368 49.95672) + (path /55C8C838) + (fp_text reference P10 (at 0 0) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value GND (at -1.54178 -0.04572 90) (layer F.SilkS) + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 3 GND) + ) + ) + + (module SO8ESKINNY (layer F.Cu) (tedit 55E49537) (tstamp 55C8BDDD) + (at 64.1462 42.0876 90) + (descr "module CMS SOJ 8 pins etroit") + (tags "CMS SOJ") + (path /55C8B733) + (attr smd) + (fp_text reference U3 (at 0 -0.889 90) (layer F.SilkS) + (effects (font (size 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N-0000012) + ) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 55C8FB30) (tstamp 55C8EFCE) + (at 48.8252 47.8702) + (path /55C8F0BE) + (fp_text reference P12 (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value GPIO14 (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 12 N-000002) + ) + ) + + (module .1SMTPIN (layer F.Cu) (tedit 55C8FB29) (tstamp 55C8EFD3) + (at 51.1625 47.5473) + (path /55C8F0C4) + (fp_text reference P13 (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (fp_text value GPIO12 (at 0 0) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.15))) + ) + (pad 1 smd circle (at 0 0) (size 2.032 2.032) + (layers F.Cu F.Paste F.Mask) + (net 19 N-000003) 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38.325331 48.87594) (xy 38.438319 48.988928) + (xy 38.174923 49.091346) (xy 38.1723 49.098571) (xy 38.1723 34.51225) (xy 43.988264 34.51225) (xy 43.988264 34.325314) + (xy 44.12996 34.3535) (xy 44.63796 34.3535) (xy 44.924705 34.296463) (xy 45.167795 34.134035) (xy 45.675795 33.626035) + (xy 45.838223 33.382945) (xy 45.855225 33.297465) (xy 45.940704 33.280463) (xy 45.940705 33.280463) (xy 46.183795 33.118035) + (xy 46.346223 32.874945) (xy 46.346223 32.874944) (xy 46.403259 32.5882) (xy 46.40326 32.5882) (xy 46.346223 32.301455) + (xy 46.183795 32.058365) (xy 45.675795 31.550365) (xy 45.432705 31.387937) (xy 45.14596 31.3309) (xy 44.859215 31.387937) + (xy 44.616125 31.550365) (xy 44.453697 31.793455) (xy 44.436694 31.878934) (xy 44.351215 31.895937) (xy 44.108125 32.058365) + (xy 43.988264 32.178226) (xy 43.988264 31.1723) (xy 68.8277 31.1723) (xy 68.8277 53.8277) + ) + ) + ) +) diff --git a/embedded8266/hardware/esp_onelayer3.net b/embedded8266/hardware/esp_onelayer3.net new file mode 100644 index 0000000..f20e35d --- /dev/null +++ b/embedded8266/hardware/esp_onelayer3.net @@ -0,0 +1,478 @@ +(export (version D) + (design + (source /home/cnlohr/electrical/esp_onelayer/esp_onelayer3.sch) + (date "Wed 02 Sep 2015 04:12:05 PM EDT") + (tool "eeschema (2013-jul-07)-stable")) + (components + (comp (ref X1) + (value 26MHz) + (footprint XTAL4P) + (libsource (lib esp_onelayer2-cache) (part XTAL4P)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B716)) + (comp (ref U3) + (value W25Q16DV) + (footprint SO8ESKINNY) + (libsource (lib esp_onelayer2-cache) (part 25Q40B)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B733)) + (comp (ref C5) + (value 5.6p) + (footprint SM0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B75E)) + (comp (ref R4) + (value 12k) + (footprint SM0603) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B7AB)) + (comp (ref R5) + (value 12k) + (footprint SM0603) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B7BD)) + (comp (ref P4) + (value GND) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B809)) + (comp (ref P5) + (value 5V) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B835)) + (comp (ref P3) + (value GND) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B83B)) + (comp (ref C6) + (value 12p) + (footprint SM0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B88E)) + (comp (ref C7) + (value 12p) + (footprint SM0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B894)) + (comp (ref P8) + (value GPIO0) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B8D4)) + (comp (ref P7) + (value UTX) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B8E6)) + (comp (ref P9) + (value URX) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B8EC)) + (comp (ref P6) + (value GPIO2) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B90A)) + (comp (ref U1) + (value AP1117) + (footprint SOT223) + (libsource (lib esp_onelayer2-cache) (part AP1117)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8C2C5)) + (comp (ref C3) + (value 10u) + (footprint SM0805) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8C2DE)) + (comp (ref C2) + (value 10u) + (footprint SM0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8C2E4)) + (comp (ref C1) + (value 1u) + (footprint SM0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8C2EA)) + (comp (ref P11) + (value 5V) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8C79F)) + (comp (ref P10) + (value GND) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8C838)) + (comp (ref R6) + (value 0) + (footprint SM0805) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8CBA7)) + (comp (ref P12) + (value GPIO14) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8F0BE)) + (comp (ref P13) + (value GPIO12) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8F0C4)) + (comp (ref P14) + (value GPIO5) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8F0CA)) + (comp (ref P16) + (value GND) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55CA0893)) + (comp (ref P17) + (value GPIO15) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55D24760)) + (comp (ref U2) + (value ESP8266EX) + (footprint QFN32) + (libsource (lib esp_onelayer2-cache) (part ESP8266EX)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B6FD)) + (comp (ref C8) + (value .1u) + (footprint SM0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 55E475A5)) + (comp (ref P2) + (value UFL) + (footprint UFL) + (libsource (lib conn) (part CONN_2)) + (sheetpath (names /) (tstamps /)) + (tstamp 55E474E2)) + (comp (ref P1) + (value MIC) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55C8B86A)) + (comp (ref R2) + (value NP) + (footprint SM0603) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 55E48F87)) + (comp (ref R1) + (value 333k) + (footprint SM0603) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 55E48F8D)) + (comp (ref R3) + (value 12k) + (footprint SM0603) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 55E49550)) + (comp (ref R7) + (value 0) + (footprint SM0805) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 55E49C42)) + (comp (ref C4) + (value 10u) + (footprint SM0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 55E70B25)) + (comp (ref P15) + (value 5V) + (footprint .1SMTPIN) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 55E75812))) + (libparts + (libpart (lib device) (part C) + (description "Condensateur non polarise") + (footprints + (fp SM*) + (fp C?) + (fp C1-1)) + (fields + (field (name Reference) C) + (field (name Value) C) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib device) (part R) + (description Resistance) + (footprints + (fp R?) + (fp SM0603) + (fp SM0805) + (fp R?-*) + (fp SM1206)) + (fields + (field (name Reference) R) + (field (name Value) R) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib conn) (part CONN_1) + (description "1 pin") + (fields + (field (name Reference) P) + (field (name Value) CONN_1)) + (pins + (pin (num 1) (name 1) (type passive)))) + (libpart (lib conn) (part CONN_2) + (description "Symbole general de connecteur") + (fields + (field (name Reference) P) + (field (name Value) CONN_2)) + (pins + (pin (num 1) (name P1) (type passive)) + (pin (num 2) (name PM) (type passive)))) + (libpart (lib esp_onelayer2-cache) (part 25Q40B) + (fields + (field (name Reference) U) + (field (name Value) 25Q40B) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name ~CS) (type input)) + (pin (num 2) (name DO/IO1) (type input)) + (pin (num 3) (name ~WP~/IO2) (type input)) + (pin (num 4) (name GND) (type input)) + (pin (num 5) (name DI/IO0) (type input)) + (pin (num 6) (name CLK) (type input)) + (pin (num 7) (name ~HOLD~/IO3) (type input)) + (pin (num 8) (name VCC) (type input)) + (pin (num 9) (name GND) (type input)))) + (libpart (lib esp_onelayer2-cache) (part AP1117) + (fields + (field (name Reference) U) + (field (name Value) AP1117) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name GND) (type BiDi)) + (pin (num 2) (name Vout) (type BiDi)) + (pin (num 3) (name Vin) (type BiDi)) + (pin (num 4) (name Vout2) (type BiDi)))) + (libpart (lib esp_onelayer2-cache) (part ESP8266EX) + (fields + (field (name Reference) U) + (field (name Value) ESP8266EX) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name VddA) (type input)) + (pin (num 2) (name LNA/ANT) (type input)) + (pin (num 3) (name Vdd3P3) (type input)) + (pin (num 4) (name Vdd3P3) (type input)) + (pin (num 5) (name VddRCT) (type input)) + (pin (num 6) (name TOUT) (type input)) + (pin (num 7) (name CHIP_EN) (type input)) + (pin (num 8) (name XPD_DCDC) (type input)) + (pin (num 9) (name MTMS/GPIO14) (type input)) + (pin (num 10) (name MTDI/GPIO12) (type input)) + (pin (num 11) (name VddPST) (type input)) + (pin (num 12) (name MTCK/GPIO13) (type input)) + (pin (num 13) (name MTDO/GPIO15) (type input)) + (pin (num 14) (name GPIO2) (type input)) + (pin (num 15) (name GPIO0) (type input)) + (pin (num 16) (name GP4/VD) (type input)) + (pin (num 17) (name VddPST) (type input)) + (pin (num 18) (name SD_D2) (type input)) + (pin (num 19) (name SD_D3) (type input)) + (pin (num 20) (name SD_CMD) (type input)) + (pin (num 21) (name SD_CLK) (type input)) + (pin (num 22) (name SD_D0) (type input)) + (pin (num 23) (name SD_D1) (type input)) + (pin (num 24) (name GP5/VD) (type input)) + (pin (num 25) (name URXD) (type input)) + (pin (num 26) (name UTXD) (type input)) + (pin (num 27) (name XTAL_OUT) (type input)) + (pin (num 28) (name XTAL_IN) (type input)) + (pin (num 29) (name VDDD) (type input)) + (pin (num 30) (name VDDA) (type input)) + (pin (num 31) (name RES12K) (type input)) + (pin (num 32) (name EXT_RSTB) (type input)) + (pin (num 33) (name GND) (type input)))) + (libpart (lib esp_onelayer2-cache) (part XTAL4P) + (fields + (field (name Reference) X) + (field (name Value) XTAL4P) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name 1) (type passive)) + (pin (num 2) (name 2) (type passive)) + (pin (num 3) (name GND) (type passive)) + (pin (num 4) (name GND) (type passive))))) + (libraries + (library (logical device) + (uri /usr/share/kicad/library/device.lib)) + (library (logical conn) + (uri /usr/share/kicad/library/conn.lib)) + (library (logical esp_onelayer2-cache) + (uri /home/cnlohr/electrical/esp_onelayer/esp_onelayer2-cache.lib))) + (nets + (net (code 1) (name "") + (node (ref U2) (pin 16)) + (node (ref P14) (pin 1))) + (net (code 2) (name "") + (node (ref U2) (pin 9)) + (node (ref P12) (pin 1))) + (net (code 3) (name "") + (node (ref U2) (pin 10)) + (node (ref P13) (pin 1))) + (net (code 4) (name "") + (node (ref U2) (pin 18)) + (node (ref R6) (pin 1))) + (net (code 5) (name "") + (node (ref U2) (pin 26)) + (node (ref P7) (pin 1))) + (net (code 6) (name "") + (node (ref U2) (pin 5))) + (net (code 7) (name "") + (node (ref U2) (pin 21)) + (node (ref U3) (pin 6))) + (net (code 8) (name "") + (node (ref U2) (pin 23)) + (node (ref U3) (pin 5))) + (net (code 9) (name "") + (node (ref U3) (pin 2)) + (node (ref U2) (pin 22))) + (net (code 10) (name "") + (node (ref U2) (pin 20)) + (node (ref U3) (pin 1))) + (net (code 11) (name "") + (node (ref U3) (pin 3)) + (node (ref U2) (pin 19))) + (net (code 12) (name "") + (node (ref R6) (pin 2)) + (node (ref U3) (pin 7))) + (net (code 13) (name +5V) + (node (ref P15) (pin 1)) + (node (ref C3) (pin 2)) + (node (ref U1) (pin 3)) + (node (ref P11) (pin 1))) + (net (code 14) (name GND) + (node (ref C3) (pin 1)) + (node (ref P16) (pin 1)) + (node (ref U1) (pin 1)) + (node (ref P2) (pin 2)) + (node (ref R2) (pin 1)) + (node (ref U2) (pin 33)) + (node (ref U2) (pin 24)) + (node (ref X1) (pin 4)) + (node (ref X1) (pin 3)) + (node (ref C7) (pin 2)) + (node (ref U3) (pin 4)) + (node (ref C6) (pin 2)) + (node (ref P3) (pin 1)) + (node (ref R4) (pin 1)) + (node (ref P4) (pin 1)) + (node (ref C2) (pin 1)) + (node (ref C1) (pin 1)) + (node (ref P10) (pin 1)) + (node (ref R7) (pin 1)) + (node (ref R3) (pin 2)) + (node (ref R7) (pin 2)) + (node (ref U2) (pin 8)) + (node (ref U2) (pin 12)) + (node (ref C8) (pin 1)) + (node (ref C4) (pin 1))) + (net (code 15) (name "") + (node (ref R3) (pin 1)) + (node (ref P17) (pin 1)) + (node (ref U2) (pin 13))) + (net (code 16) (name "") + (node (ref R1) (pin 2)) + (node (ref U2) (pin 6)) + (node (ref R2) (pin 2)) + (node (ref P1) (pin 1))) + (net (code 17) (name +3.3V) + (node (ref C8) (pin 2)) + (node (ref U2) (pin 4)) + (node (ref U2) (pin 1)) + (node (ref U2) (pin 32)) + (node (ref U2) (pin 11)) + (node (ref U2) (pin 30)) + (node (ref U2) (pin 29)) + (node (ref R1) (pin 1)) + (node (ref U2) (pin 7)) + (node (ref U2) (pin 3)) + (node (ref C4) (pin 2)) + (node (ref R5) (pin 2)) + (node (ref U1) (pin 4)) + (node (ref C2) (pin 2)) + (node (ref C1) (pin 2)) + (node (ref U1) (pin 2)) + (node (ref P5) (pin 1)) + (node (ref U2) (pin 17)) + (node (ref U3) (pin 8))) + (net (code 18) (name "") + (node (ref P8) (pin 1)) + (node (ref R5) (pin 1)) + (node (ref U2) (pin 15))) + (net (code 19) (name "") + (node (ref U2) (pin 31)) + (node (ref R4) (pin 2))) + (net (code 20) (name "") + (node (ref C5) (pin 2)) + (node (ref U2) (pin 2))) + (net (code 21) (name "") + (node (ref C5) (pin 1)) + (node (ref P2) (pin 1))) + (net (code 22) (name "") + (node (ref U3) (pin 9))) + (net (code 23) (name "") + (node (ref P6) (pin 1)) + (node (ref U2) (pin 14))) + (net (code 24) (name "") + (node (ref U2) (pin 25)) + (node (ref P9) (pin 1))) + (net (code 25) (name "") + (node (ref U2) (pin 27)) + (node (ref C7) (pin 1)) + (node (ref X1) (pin 1))) + (net (code 26) (name "") + (node (ref C6) (pin 1)) + (node (ref X1) (pin 2)) + (node (ref U2) (pin 28))))) \ No newline at end of file diff --git a/embedded8266/hardware/esp_onelayer3.pro b/embedded8266/hardware/esp_onelayer3.pro new file mode 100644 index 0000000..0183b18 --- /dev/null +++ b/embedded8266/hardware/esp_onelayer3.pro @@ -0,0 +1,142 @@ +update=Wed 02 Sep 2015 10:39:19 AM EDT +last_client=pcbnew +[pcbnew] +version=1 +LastNetListRead=esp_onelayer3.net +UseCmpFile=1 +PadDrill=" 0.000000" +PadDrillOvalY=" 0.000000" +PadSizeH=" 1.778000" +PadSizeV=" 1.778000" +PcbTextSizeV=" 0.762000" +PcbTextSizeH=" 0.762000" +PcbTextThickness=" 0.300000" +ModuleTextSizeV=" 0.762000" +ModuleTextSizeH=" 0.762000" +ModuleTextSizeThickness=" 0.150000" +SolderMaskClearance=" 0.000000" +SolderMaskMinWidth=" 0.000000" +DrawSegmentWidth=" 0.200000" +BoardOutlineThickness=" 0.100000" +ModuleOutlineThickness=" 0.150000" +[pcbnew/libraries] +LibDir= +LibName1=sockets +LibName2=connect +LibName3=discret +LibName4=pin_array +LibName5=divers +LibName6=smd_capacitors +LibName7=smd_resistors +LibName8=smd_crystal&oscillator +LibName9=smd_dil +LibName10=smd_transistors +LibName11=libcms +LibName12=display +LibName13=led +LibName14=dip_sockets +LibName15=pga_sockets +LibName16=valves +LibName17=/home/cnlohr/electrical/kicad/SO8E-WITHPAD +LibName18=/home/cnlohr/electrical/kicad/WS2812B +LibName19=/home/cnlohr/electrical/kicad/MOSFET-LFPAK56 +LibName20=/home/cnlohr/electrical/kicad/SMT_ETHERNET +LibName21=/home/cnlohr/electrical/kicad/DE-9-CONN-SDS107-PRW2-M09-SN63-11 +LibName22=/home/cnlohr/electrical/kicad/DIL-14 +LibName23=/home/cnlohr/electrical/kicad/DLONG +LibName24=/home/cnlohr/electrical/kicad/PHOENIX1935187 +LibName25=/home/cnlohr/electrical/kicad/2SMTPIN +LibName26=/home/cnlohr/electrical/kicad/PHOENIX1771130WIDE +LibName27=/home/cnlohr/electrical/kicad/SEMTEDGE6 +LibName28=/home/cnlohr/electrical/kicad/LINEAR_SLIDE_POT_PTA3043 +LibName29=/home/cnlohr/electrical/kicad/632HOLE +LibName30=/home/cnlohr/electrical/kicad/BK-6013 +LibName31=/home/cnlohr/electrical/kicad/SMTEDGE6 +LibName32=/home/cnlohr/electrical/kicad/1SMTPIN +LibName33=/home/cnlohr/electrical/kicad/MICROSD_1050270001 +LibName34=/home/cnlohr/electrical/kicad/NETWORK0606 +LibName35=/home/cnlohr/electrical/kicad/BOURNS-SRR1280 +LibName36=/home/cnlohr/electrical/kicad/SO16MULTI +LibName37=/home/cnlohr/electrical/kicad/PanasonicD8Cap +LibName38=/home/cnlohr/electrical/kicad/PHOENIX1985292 +LibName39=/home/cnlohr/electrical/kicad/SMTEDGE8 +LibName40=/home/cnlohr/electrical/kicad/SMTEDGE4 +LibName41=/home/cnlohr/electrical/kicad/U5 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+LibName118=/home/cnlohr/electrical/kicad/SO8ESKINNY +LibName119=/home/cnlohr/electrical/kicad/UFL diff --git a/embedded8266/hardware/esp_onelayer3.sch b/embedded8266/hardware/esp_onelayer3.sch new file mode 100644 index 0000000..086324d --- /dev/null +++ b/embedded8266/hardware/esp_onelayer3.sch @@ -0,0 +1,1057 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:esp_onelayer2-cache +EELAYER 27 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "2 sep 2015" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L 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