I am on my way with this, but it's going slowly.
This commit is contained in:
parent
202a67326a
commit
518d69c0aa
BIN
embedded8266/0x00000.bin
Normal file
BIN
embedded8266/0x00000.bin
Normal file
Binary file not shown.
BIN
embedded8266/0x40000.bin
Normal file
BIN
embedded8266/0x40000.bin
Normal file
Binary file not shown.
27
embedded8266/LICENSE
Normal file
27
embedded8266/LICENSE
Normal file
|
@ -0,0 +1,27 @@
|
||||||
|
Portions of this code are under various Espressif licenses.
|
||||||
|
|
||||||
|
Please take not of the individual files. All files that are
|
||||||
|
written without license, by me are under the MIT license as reads below.
|
||||||
|
|
||||||
|
The MIT License (MIT)
|
||||||
|
|
||||||
|
Copyright (c) 2014 Charles Lohr
|
||||||
|
|
||||||
|
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
of this software and associated documentation files (the "Software"), to deal
|
||||||
|
in the Software without restriction, including without limitation the rights
|
||||||
|
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
copies of the Software, and to permit persons to whom the Software is
|
||||||
|
furnished to do so, subject to the following conditions:
|
||||||
|
|
||||||
|
The above copyright notice and this permission notice shall be included in all
|
||||||
|
copies or substantial portions of the Software.
|
||||||
|
|
||||||
|
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||||
|
SOFTWARE.
|
||||||
|
|
81
embedded8266/Makefile
Normal file
81
embedded8266/Makefile
Normal file
|
@ -0,0 +1,81 @@
|
||||||
|
all : image.elf
|
||||||
|
FW_FILE_1:=0x00000.bin
|
||||||
|
FW_FILE_2:=0x40000.bin
|
||||||
|
|
||||||
|
TARGET_OUT:=image.elf
|
||||||
|
OBJS:=driver/uart.o \
|
||||||
|
user/mystuff.o \
|
||||||
|
user/ws2812.o \
|
||||||
|
user/colorchord.o \
|
||||||
|
user/user_main.o
|
||||||
|
|
||||||
|
SRCS:=driver/uart.c \
|
||||||
|
user/mystuff.c \
|
||||||
|
user/ws2812.c \
|
||||||
|
user/colorchord.c \
|
||||||
|
user/user_main.c
|
||||||
|
|
||||||
|
GCC_FOLDER:=~/esp8266/xtensa-toolchain-build/build-lx106
|
||||||
|
ESPTOOL_PY:=~/esp8266/esptool/esptool.py
|
||||||
|
FW_TOOL:=~/esp8266/other/esptool/esptool
|
||||||
|
SDK:=/home/cnlohr/esp8266/esp_iot_sdk_v0.9.3
|
||||||
|
PORT:=/dev/ttyUSB0
|
||||||
|
#PORT:=/dev/ttyACM0
|
||||||
|
|
||||||
|
XTLIB:=$(SDK)/lib
|
||||||
|
XTGCCLIB:=$(GCC_FOLDER)/gcc-4.9.1-elf/xtensa-lx106-elf/libgcc/libgcc.a
|
||||||
|
FOLDERPREFIX:=$(GCC_FOLDER)/root/bin
|
||||||
|
PREFIX:=$(FOLDERPREFIX)/xtensa-lx106-elf-
|
||||||
|
CC:=$(PREFIX)gcc
|
||||||
|
|
||||||
|
CFLAGS:=-mlongcalls -I$(SDK)/include -Imyclib -Iinclude -Iuser -Os -I$(SDK)/include/
|
||||||
|
|
||||||
|
# \
|
||||||
|
#
|
||||||
|
|
||||||
|
LDFLAGS_CORE:=\
|
||||||
|
-nostdlib \
|
||||||
|
-Wl,--relax -Wl,--gc-sections \
|
||||||
|
-L$(XTLIB) \
|
||||||
|
-L$(XTGCCLIB) \
|
||||||
|
$(SDK)/lib/liblwip.a \
|
||||||
|
$(SDK)/lib/libssl.a \
|
||||||
|
$(SDK)/lib/libupgrade.a \
|
||||||
|
$(SDK)/lib/libnet80211.a \
|
||||||
|
$(SDK)/lib/liblwip.a \
|
||||||
|
$(SDK)/lib/libwpa.a \
|
||||||
|
$(SDK)/lib/libnet80211.a \
|
||||||
|
$(SDK)/lib/libphy.a \
|
||||||
|
$(SDK)/lib/libmain.a \
|
||||||
|
$(SDK)/lib/libpp.a \
|
||||||
|
$(XTGCCLIB) \
|
||||||
|
-T $(SDK)/ld/eagle.app.v6.ld
|
||||||
|
|
||||||
|
LINKFLAGS:= \
|
||||||
|
$(LDFLAGS_CORE) \
|
||||||
|
-B$(XTLIB)
|
||||||
|
|
||||||
|
#image.elf : $(OBJS)
|
||||||
|
# $(PREFIX)ld $^ $(LDFLAGS) -o $@
|
||||||
|
|
||||||
|
$(TARGET_OUT) : $(SRCS)
|
||||||
|
$(PREFIX)gcc $(CFLAGS) $^ -flto $(LINKFLAGS) -o $@
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
$(FW_FILE_1): $(TARGET_OUT)
|
||||||
|
@echo "FW $@"
|
||||||
|
$(FW_TOOL) -eo $(TARGET_OUT) -bo $@ -bs .text -bs .data -bs .rodata -bc -ec
|
||||||
|
|
||||||
|
$(FW_FILE_2): $(TARGET_OUT)
|
||||||
|
@echo "FW $@"
|
||||||
|
$(FW_TOOL) -eo $(TARGET_OUT) -es .irom0.text $@ -ec
|
||||||
|
|
||||||
|
burn : $(FW_FILE_1) $(FW_FILE_2)
|
||||||
|
($(ESPTOOL_PY) --port $(PORT) write_flash 0x00000 0x00000.bin 0x40000 0x40000.bin)||(true)
|
||||||
|
|
||||||
|
|
||||||
|
clean :
|
||||||
|
rm -rf user/*.o driver/*.o $(TARGET_OUT) $(FW_FILE_1) $(FW_FILE_2)
|
||||||
|
|
||||||
|
|
5
embedded8266/README.md
Normal file
5
embedded8266/README.md
Normal file
|
@ -0,0 +1,5 @@
|
||||||
|
#ESP8266 ColorChord Driver
|
||||||
|
|
||||||
|
Please see the main ws2812esp8266 project for help with setting up your environment and programming, etc.
|
||||||
|
|
||||||
|
|
247
embedded8266/driver/uart.c
Normal file
247
embedded8266/driver/uart.c
Normal file
|
@ -0,0 +1,247 @@
|
||||||
|
/******************************************************************************
|
||||||
|
* Copyright 2013-2014 Espressif Systems (Wuxi)
|
||||||
|
*
|
||||||
|
* FileName: uart.c
|
||||||
|
*
|
||||||
|
* Description: Two UART mode configration and interrupt handler.
|
||||||
|
* Check your hardware connection while use this mode.
|
||||||
|
*
|
||||||
|
* Modification history:
|
||||||
|
* 2014/3/12, v1.0 create this file.
|
||||||
|
*******************************************************************************/
|
||||||
|
#include <osapi.h>
|
||||||
|
#include <ets_sys.h>
|
||||||
|
#include <driver/uart.h>
|
||||||
|
|
||||||
|
#include <driver/uart_register.h>
|
||||||
|
//#include "ssc.h"
|
||||||
|
//#include "at.h"
|
||||||
|
|
||||||
|
// UartDev is defined and initialized in rom code.
|
||||||
|
extern UartDevice UartDev;
|
||||||
|
//extern os_event_t at_recvTaskQueue[at_recvTaskQueueLen];
|
||||||
|
|
||||||
|
LOCAL void uart0_rx_intr_handler(void *para);
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* FunctionName : uart_config
|
||||||
|
* Description : Internal used function
|
||||||
|
* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
|
||||||
|
* UART1 just used for debug output
|
||||||
|
* Parameters : uart_no, use UART0 or UART1 defined ahead
|
||||||
|
* Returns : NONE
|
||||||
|
*******************************************************************************/
|
||||||
|
LOCAL void ICACHE_FLASH_ATTR
|
||||||
|
uart_config(uint8 uart_no)
|
||||||
|
{
|
||||||
|
if (uart_no == UART1)
|
||||||
|
{
|
||||||
|
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* rcv_buff size if 0x100 */
|
||||||
|
ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff));
|
||||||
|
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
|
||||||
|
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
|
||||||
|
// PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
|
||||||
|
}
|
||||||
|
|
||||||
|
uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
|
||||||
|
|
||||||
|
WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity
|
||||||
|
| UartDev.parity
|
||||||
|
| (UartDev.stop_bits << UART_STOP_BIT_NUM_S)
|
||||||
|
| (UartDev.data_bits << UART_BIT_NUM_S));
|
||||||
|
|
||||||
|
//clear rx and tx fifo,not ready
|
||||||
|
SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
|
||||||
|
CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
|
||||||
|
|
||||||
|
//set rx fifo trigger
|
||||||
|
// WRITE_PERI_REG(UART_CONF1(uart_no),
|
||||||
|
// ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
|
||||||
|
// ((96 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S) |
|
||||||
|
// UART_RX_FLOW_EN);
|
||||||
|
if (uart_no == UART0)
|
||||||
|
{
|
||||||
|
//set rx fifo trigger
|
||||||
|
WRITE_PERI_REG(UART_CONF1(uart_no),
|
||||||
|
((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
|
||||||
|
((0x01 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
|
||||||
|
UART_RX_FLOW_EN);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
WRITE_PERI_REG(UART_CONF1(uart_no),
|
||||||
|
((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
|
||||||
|
}
|
||||||
|
|
||||||
|
//clear all interrupt
|
||||||
|
WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
|
||||||
|
//enable rx_interrupt
|
||||||
|
SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* FunctionName : uart1_tx_one_char
|
||||||
|
* Description : Internal used function
|
||||||
|
* Use uart1 interface to transfer one char
|
||||||
|
* Parameters : uint8 TxChar - character to tx
|
||||||
|
* Returns : OK
|
||||||
|
*******************************************************************************/
|
||||||
|
LOCAL STATUS
|
||||||
|
uart_tx_one_char(uint8 uart, uint8 TxChar)
|
||||||
|
{
|
||||||
|
while (true)
|
||||||
|
{
|
||||||
|
uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
|
||||||
|
if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
WRITE_PERI_REG(UART_FIFO(uart) , TxChar);
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* FunctionName : uart1_write_char
|
||||||
|
* Description : Internal used function
|
||||||
|
* Do some special deal while tx char is '\r' or '\n'
|
||||||
|
* Parameters : char c - character to tx
|
||||||
|
* Returns : NONE
|
||||||
|
*******************************************************************************/
|
||||||
|
LOCAL void ICACHE_FLASH_ATTR
|
||||||
|
uart1_write_char(char c)
|
||||||
|
{
|
||||||
|
if (c == '\n')
|
||||||
|
{
|
||||||
|
uart_tx_one_char(UART1, '\r');
|
||||||
|
uart_tx_one_char(UART1, '\n');
|
||||||
|
}
|
||||||
|
else if (c == '\r')
|
||||||
|
{
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
uart_tx_one_char(UART1, c);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/******************************************************************************
|
||||||
|
* FunctionName : uart0_tx_buffer
|
||||||
|
* Description : use uart0 to transfer buffer
|
||||||
|
* Parameters : uint8 *buf - point to send buffer
|
||||||
|
* uint16 len - buffer len
|
||||||
|
* Returns :
|
||||||
|
*******************************************************************************/
|
||||||
|
void ICACHE_FLASH_ATTR
|
||||||
|
uart0_tx_buffer(uint8 *buf, uint16 len)
|
||||||
|
{
|
||||||
|
uint16 i;
|
||||||
|
|
||||||
|
for (i = 0; i < len; i++)
|
||||||
|
{
|
||||||
|
uart_tx_one_char(UART0, buf[i]);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* FunctionName : uart0_sendStr
|
||||||
|
* Description : use uart0 to transfer buffer
|
||||||
|
* Parameters : uint8 *buf - point to send buffer
|
||||||
|
* uint16 len - buffer len
|
||||||
|
* Returns :
|
||||||
|
*******************************************************************************/
|
||||||
|
void ICACHE_FLASH_ATTR
|
||||||
|
uart0_sendStr(const char *str)
|
||||||
|
{
|
||||||
|
while(*str)
|
||||||
|
{
|
||||||
|
uart_tx_one_char(UART0, *str++);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* FunctionName : uart0_rx_intr_handler
|
||||||
|
* Description : Internal used function
|
||||||
|
* UART0 interrupt handler, add self handle code inside
|
||||||
|
* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
|
||||||
|
* Returns : NONE
|
||||||
|
*******************************************************************************/
|
||||||
|
extern void at_recvTask(void);
|
||||||
|
|
||||||
|
LOCAL void
|
||||||
|
uart0_rx_intr_handler(void *para)
|
||||||
|
{
|
||||||
|
/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
|
||||||
|
* uart1 and uart0 respectively
|
||||||
|
*/
|
||||||
|
// RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
|
||||||
|
// uint8 RcvChar;
|
||||||
|
uint8 uart_no = UART0;//UartDev.buff_uart_no;
|
||||||
|
|
||||||
|
// if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST))
|
||||||
|
// {
|
||||||
|
// return;
|
||||||
|
// }
|
||||||
|
if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST))
|
||||||
|
{
|
||||||
|
at_recvTask();
|
||||||
|
WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
|
||||||
|
}
|
||||||
|
|
||||||
|
// WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
|
||||||
|
|
||||||
|
// if (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
|
||||||
|
// {
|
||||||
|
// RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xFF;
|
||||||
|
// at_recvTask();
|
||||||
|
// *(pRxBuff->pWritePos) = RcvChar;
|
||||||
|
|
||||||
|
// system_os_post(at_recvTaskPrio, NULL, RcvChar);
|
||||||
|
|
||||||
|
// //insert here for get one command line from uart
|
||||||
|
// if (RcvChar == '\r')
|
||||||
|
// {
|
||||||
|
// pRxBuff->BuffState = WRITE_OVER;
|
||||||
|
// }
|
||||||
|
//
|
||||||
|
// pRxBuff->pWritePos++;
|
||||||
|
//
|
||||||
|
// if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE))
|
||||||
|
// {
|
||||||
|
// // overflow ...we may need more error handle here.
|
||||||
|
// pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff ;
|
||||||
|
// }
|
||||||
|
// }
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* FunctionName : uart_init
|
||||||
|
* Description : user interface for init uart
|
||||||
|
* Parameters : UartBautRate uart0_br - uart0 bautrate
|
||||||
|
* UartBautRate uart1_br - uart1 bautrate
|
||||||
|
* Returns : NONE
|
||||||
|
*******************************************************************************/
|
||||||
|
void ICACHE_FLASH_ATTR
|
||||||
|
uart_init(UartBautRate uart0_br, UartBautRate uart1_br)
|
||||||
|
{
|
||||||
|
// rom use 74880 baut_rate, here reinitialize
|
||||||
|
UartDev.baut_rate = uart0_br;
|
||||||
|
uart_config(UART0);
|
||||||
|
UartDev.baut_rate = uart1_br;
|
||||||
|
uart_config(UART1);
|
||||||
|
ETS_UART_INTR_ENABLE();
|
||||||
|
|
||||||
|
// install uart1 putc callback
|
||||||
|
os_install_putc1((void *)uart1_write_char);
|
||||||
|
}
|
||||||
|
|
||||||
|
void ICACHE_FLASH_ATTR
|
||||||
|
uart_reattach()
|
||||||
|
{
|
||||||
|
uart_init(BIT_RATE_74880, BIT_RATE_74880);
|
||||||
|
// ETS_UART_INTR_ATTACH(uart_rx_intr_handler_ssc, &(UartDev.rcv_buff));
|
||||||
|
// ETS_UART_INTR_ENABLE();
|
||||||
|
}
|
BIN
embedded8266/image.elf
Executable file
BIN
embedded8266/image.elf
Executable file
Binary file not shown.
101
embedded8266/include/driver/uart.h
Normal file
101
embedded8266/include/driver/uart.h
Normal file
|
@ -0,0 +1,101 @@
|
||||||
|
#ifndef UART_APP_H
|
||||||
|
#define UART_APP_H
|
||||||
|
|
||||||
|
#include "uart_register.h"
|
||||||
|
#include "eagle_soc.h"
|
||||||
|
#include "c_types.h"
|
||||||
|
|
||||||
|
#define RX_BUFF_SIZE 256
|
||||||
|
#define TX_BUFF_SIZE 100
|
||||||
|
#define UART0 0
|
||||||
|
#define UART1 1
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
FIVE_BITS = 0x0,
|
||||||
|
SIX_BITS = 0x1,
|
||||||
|
SEVEN_BITS = 0x2,
|
||||||
|
EIGHT_BITS = 0x3
|
||||||
|
} UartBitsNum4Char;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
ONE_STOP_BIT = 0,
|
||||||
|
ONE_HALF_STOP_BIT = BIT2,
|
||||||
|
TWO_STOP_BIT = BIT2
|
||||||
|
} UartStopBitsNum;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
NONE_BITS = 0,
|
||||||
|
ODD_BITS = 0,
|
||||||
|
EVEN_BITS = BIT4
|
||||||
|
} UartParityMode;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
STICK_PARITY_DIS = 0,
|
||||||
|
STICK_PARITY_EN = BIT3 | BIT5
|
||||||
|
} UartExistParity;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
BIT_RATE_9600 = 9600,
|
||||||
|
BIT_RATE_19200 = 19200,
|
||||||
|
BIT_RATE_38400 = 38400,
|
||||||
|
BIT_RATE_57600 = 57600,
|
||||||
|
BIT_RATE_74880 = 74880,
|
||||||
|
BIT_RATE_115200 = 115200,
|
||||||
|
BIT_RATE_230400 = 230400,
|
||||||
|
BIT_RATE_460800 = 460800,
|
||||||
|
BIT_RATE_921600 = 921600
|
||||||
|
} UartBautRate;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
NONE_CTRL,
|
||||||
|
HARDWARE_CTRL,
|
||||||
|
XON_XOFF_CTRL
|
||||||
|
} UartFlowCtrl;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
EMPTY,
|
||||||
|
UNDER_WRITE,
|
||||||
|
WRITE_OVER
|
||||||
|
} RcvMsgBuffState;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
uint32 RcvBuffSize;
|
||||||
|
uint8 *pRcvMsgBuff;
|
||||||
|
uint8 *pWritePos;
|
||||||
|
uint8 *pReadPos;
|
||||||
|
uint8 TrigLvl; //JLU: may need to pad
|
||||||
|
RcvMsgBuffState BuffState;
|
||||||
|
} RcvMsgBuff;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
uint32 TrxBuffSize;
|
||||||
|
uint8 *pTrxBuff;
|
||||||
|
} TrxMsgBuff;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
BAUD_RATE_DET,
|
||||||
|
WAIT_SYNC_FRM,
|
||||||
|
SRCH_MSG_HEAD,
|
||||||
|
RCV_MSG_BODY,
|
||||||
|
RCV_ESC_CHAR,
|
||||||
|
} RcvMsgState;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
UartBautRate baut_rate;
|
||||||
|
UartBitsNum4Char data_bits;
|
||||||
|
UartExistParity exist_parity;
|
||||||
|
UartParityMode parity; // chip size in byte
|
||||||
|
UartStopBitsNum stop_bits;
|
||||||
|
UartFlowCtrl flow_ctrl;
|
||||||
|
RcvMsgBuff rcv_buff;
|
||||||
|
TrxMsgBuff trx_buff;
|
||||||
|
RcvMsgState rcv_state;
|
||||||
|
int received;
|
||||||
|
int buff_uart_no; //indicate which uart use tx/rx buffer
|
||||||
|
} UartDevice;
|
||||||
|
|
||||||
|
void uart_init(UartBautRate uart0_br, UartBautRate uart1_br);
|
||||||
|
void uart0_sendStr(const char *str);
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
128
embedded8266/include/driver/uart_register.h
Normal file
128
embedded8266/include/driver/uart_register.h
Normal file
|
@ -0,0 +1,128 @@
|
||||||
|
//Generated at 2012-07-03 18:44:06
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2010 - 2011 Espressif System
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef UART_REGISTER_H_INCLUDED
|
||||||
|
#define UART_REGISTER_H_INCLUDED
|
||||||
|
#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00)
|
||||||
|
//version value:32'h062000
|
||||||
|
|
||||||
|
#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0)
|
||||||
|
#define UART_RXFIFO_RD_BYTE 0x000000FF
|
||||||
|
#define UART_RXFIFO_RD_BYTE_S 0
|
||||||
|
|
||||||
|
#define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4)
|
||||||
|
#define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
|
||||||
|
#define UART_BRK_DET_INT_RAW (BIT(7))
|
||||||
|
#define UART_CTS_CHG_INT_RAW (BIT(6))
|
||||||
|
#define UART_DSR_CHG_INT_RAW (BIT(5))
|
||||||
|
#define UART_RXFIFO_OVF_INT_RAW (BIT(4))
|
||||||
|
#define UART_FRM_ERR_INT_RAW (BIT(3))
|
||||||
|
#define UART_PARITY_ERR_INT_RAW (BIT(2))
|
||||||
|
#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
|
||||||
|
#define UART_RXFIFO_FULL_INT_RAW (BIT(0))
|
||||||
|
|
||||||
|
#define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8)
|
||||||
|
#define UART_RXFIFO_TOUT_INT_ST (BIT(8))
|
||||||
|
#define UART_BRK_DET_INT_ST (BIT(7))
|
||||||
|
#define UART_CTS_CHG_INT_ST (BIT(6))
|
||||||
|
#define UART_DSR_CHG_INT_ST (BIT(5))
|
||||||
|
#define UART_RXFIFO_OVF_INT_ST (BIT(4))
|
||||||
|
#define UART_FRM_ERR_INT_ST (BIT(3))
|
||||||
|
#define UART_PARITY_ERR_INT_ST (BIT(2))
|
||||||
|
#define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
|
||||||
|
#define UART_RXFIFO_FULL_INT_ST (BIT(0))
|
||||||
|
|
||||||
|
#define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC)
|
||||||
|
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
|
||||||
|
#define UART_BRK_DET_INT_ENA (BIT(7))
|
||||||
|
#define UART_CTS_CHG_INT_ENA (BIT(6))
|
||||||
|
#define UART_DSR_CHG_INT_ENA (BIT(5))
|
||||||
|
#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
|
||||||
|
#define UART_FRM_ERR_INT_ENA (BIT(3))
|
||||||
|
#define UART_PARITY_ERR_INT_ENA (BIT(2))
|
||||||
|
#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
|
||||||
|
#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
|
||||||
|
|
||||||
|
#define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10)
|
||||||
|
#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
|
||||||
|
#define UART_BRK_DET_INT_CLR (BIT(7))
|
||||||
|
#define UART_CTS_CHG_INT_CLR (BIT(6))
|
||||||
|
#define UART_DSR_CHG_INT_CLR (BIT(5))
|
||||||
|
#define UART_RXFIFO_OVF_INT_CLR (BIT(4))
|
||||||
|
#define UART_FRM_ERR_INT_CLR (BIT(3))
|
||||||
|
#define UART_PARITY_ERR_INT_CLR (BIT(2))
|
||||||
|
#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
|
||||||
|
#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
|
||||||
|
|
||||||
|
#define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14)
|
||||||
|
#define UART_CLKDIV_CNT 0x000FFFFF
|
||||||
|
#define UART_CLKDIV_S 0
|
||||||
|
|
||||||
|
#define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18)
|
||||||
|
#define UART_GLITCH_FILT 0x000000FF
|
||||||
|
#define UART_GLITCH_FILT_S 8
|
||||||
|
#define UART_AUTOBAUD_EN (BIT(0))
|
||||||
|
|
||||||
|
#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C)
|
||||||
|
#define UART_TXD (BIT(31))
|
||||||
|
#define UART_RTSN (BIT(30))
|
||||||
|
#define UART_DTRN (BIT(29))
|
||||||
|
#define UART_TXFIFO_CNT 0x000000FF
|
||||||
|
#define UART_TXFIFO_CNT_S 16
|
||||||
|
#define UART_RXD (BIT(15))
|
||||||
|
#define UART_CTSN (BIT(14))
|
||||||
|
#define UART_DSRN (BIT(13))
|
||||||
|
#define UART_RXFIFO_CNT 0x000000FF
|
||||||
|
#define UART_RXFIFO_CNT_S 0
|
||||||
|
|
||||||
|
#define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20)
|
||||||
|
#define UART_TXFIFO_RST (BIT(18))
|
||||||
|
#define UART_RXFIFO_RST (BIT(17))
|
||||||
|
#define UART_IRDA_EN (BIT(16))
|
||||||
|
#define UART_TX_FLOW_EN (BIT(15))
|
||||||
|
#define UART_LOOPBACK (BIT(14))
|
||||||
|
#define UART_IRDA_RX_INV (BIT(13))
|
||||||
|
#define UART_IRDA_TX_INV (BIT(12))
|
||||||
|
#define UART_IRDA_WCTL (BIT(11))
|
||||||
|
#define UART_IRDA_TX_EN (BIT(10))
|
||||||
|
#define UART_IRDA_DPLX (BIT(9))
|
||||||
|
#define UART_TXD_BRK (BIT(8))
|
||||||
|
#define UART_SW_DTR (BIT(7))
|
||||||
|
#define UART_SW_RTS (BIT(6))
|
||||||
|
#define UART_STOP_BIT_NUM 0x00000003
|
||||||
|
#define UART_STOP_BIT_NUM_S 4
|
||||||
|
#define UART_BIT_NUM 0x00000003
|
||||||
|
#define UART_BIT_NUM_S 2
|
||||||
|
#define UART_PARITY_EN (BIT(1))
|
||||||
|
#define UART_PARITY (BIT(0))
|
||||||
|
|
||||||
|
#define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24)
|
||||||
|
#define UART_RX_TOUT_EN (BIT(31))
|
||||||
|
#define UART_RX_TOUT_THRHD 0x0000007F
|
||||||
|
#define UART_RX_TOUT_THRHD_S 24
|
||||||
|
#define UART_RX_FLOW_EN (BIT(23))
|
||||||
|
#define UART_RX_FLOW_THRHD 0x0000007F
|
||||||
|
#define UART_RX_FLOW_THRHD_S 16
|
||||||
|
#define UART_TXFIFO_EMPTY_THRHD 0x0000007F
|
||||||
|
#define UART_TXFIFO_EMPTY_THRHD_S 8
|
||||||
|
#define UART_RXFIFO_FULL_THRHD 0x0000007F
|
||||||
|
#define UART_RXFIFO_FULL_THRHD_S 0
|
||||||
|
|
||||||
|
#define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28)
|
||||||
|
#define UART_LOWPULSE_MIN_CNT 0x000FFFFF
|
||||||
|
#define UART_LOWPULSE_MIN_CNT_S 0
|
||||||
|
|
||||||
|
#define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C)
|
||||||
|
#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
|
||||||
|
#define UART_HIGHPULSE_MIN_CNT_S 0
|
||||||
|
|
||||||
|
#define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30)
|
||||||
|
#define UART_PULSE_NUM_CNT 0x0003FF
|
||||||
|
#define UART_PULSE_NUM_CNT_S 0
|
||||||
|
|
||||||
|
#define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78)
|
||||||
|
#define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C)
|
||||||
|
#endif // UART_REGISTER_H_INCLUDED
|
1
embedded8266/include/string.h
Normal file
1
embedded8266/include/string.h
Normal file
|
@ -0,0 +1 @@
|
||||||
|
//Nothing here.
|
10
embedded8266/include/user_config.h
Normal file
10
embedded8266/include/user_config.h
Normal file
|
@ -0,0 +1,10 @@
|
||||||
|
#ifndef __USER_CONFIG_H__
|
||||||
|
#define __USER_CONFIG_H__
|
||||||
|
|
||||||
|
#define USE_US_TIMER
|
||||||
|
#define USE_OPTIMIZE_PRINTF
|
||||||
|
#define ESP_PLATFORM 1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
150
embedded8266/user/colorchord.c
Normal file
150
embedded8266/user/colorchord.c
Normal file
|
@ -0,0 +1,150 @@
|
||||||
|
#include "colorchord.h"
|
||||||
|
|
||||||
|
static uint8_t donefirstrun;
|
||||||
|
static int8_t sintable[512]; //Actually [sin][cos] pairs.
|
||||||
|
|
||||||
|
//LDD instruction on AVR can read with constant offset. We can set Y to be the place in the buffer, and read with offset.
|
||||||
|
static uint16_t datspace[bins*4]; //(advances,places,isses,icses)
|
||||||
|
|
||||||
|
//
|
||||||
|
void HandleProgressiveInt( int8_t sample1, int8_t sample2 )
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
uint16_t startpl = 0;
|
||||||
|
int16_t ts, tc;
|
||||||
|
int16_t tmp1;
|
||||||
|
int8_t s1, c1;
|
||||||
|
uint16_t ipl, localipl, adv;
|
||||||
|
|
||||||
|
|
||||||
|
//startpl maps to 'Y'
|
||||||
|
//
|
||||||
|
|
||||||
|
|
||||||
|
//Estimated 68 minimum instructions... So for two pairs each... just under 5ksps, theoretical.
|
||||||
|
//Running overall at ~2kHz.
|
||||||
|
for( i = 0; i < bins; i++ ) //Loop, fixed size = 3 + 2 cycles 5
|
||||||
|
{
|
||||||
|
//12 cycles MIN
|
||||||
|
adv = datspace[startpl++]; //Read, indirect from RAM (and increment) 2+2 cycles 4
|
||||||
|
ipl = datspace[startpl++]; //Read, indirect from RAM (and increment) 2+2 cycles 4
|
||||||
|
|
||||||
|
//13 cycles MIN
|
||||||
|
ipl += adv; //Advance, 16bit += 16bit, 1 + 1 cycles 2
|
||||||
|
localipl = (ipl>>8)<<1; //Select upper 8 bits 1 cycles 1
|
||||||
|
|
||||||
|
// need to load Z with 'sintable' and add localipl 2
|
||||||
|
s1 = sintable[localipl++]; //Read s1 component out of table. 2+2 cycles 2
|
||||||
|
c1 = sintable[localipl++]; //Read c1 component out of table. 2 cycles 2
|
||||||
|
|
||||||
|
ts = (s1 * sample1); // 8 x 8 multiply signed + copy R1 out. zero MSB ts 2
|
||||||
|
tc = (c1 * sample1); // 8 x 8 multiply signed + copy R1 out. zero MSB tc 2
|
||||||
|
|
||||||
|
|
||||||
|
//15 cycles MIN
|
||||||
|
ipl += adv; //Advance, 16bit += 16bit, 1 + 1 cycles 2
|
||||||
|
localipl = (ipl>>8)<<1; //Select upper 8 bits 1 cycles 1
|
||||||
|
|
||||||
|
// need to load Z with 'sintable' and add localipl 2
|
||||||
|
s1 = sintable[localipl++]; //Read s1 component out of table. 2 cycles 2
|
||||||
|
c1 = sintable[localipl++]; //Read c1 component out of table. 2 cycles 2
|
||||||
|
|
||||||
|
ts += (s1 * sample2); // 8 x 8 multiply signed + add R1 out. 3
|
||||||
|
tc += (c1 * sample2); // 8 x 8 multiply signed + add R1 out. 3
|
||||||
|
|
||||||
|
|
||||||
|
//Add TS and TC to the datspace stuff. (24 instructions)
|
||||||
|
tmp1 = datspace[startpl]; //Read out, sin component. 4
|
||||||
|
tmp1 -= tmp1>>6; //Subtract from the MSB (with carry) 2
|
||||||
|
tmp1 += ts>>6; //Add MSBs with carry 2
|
||||||
|
|
||||||
|
datspace[startpl++] = tmp1; //Store values back 4
|
||||||
|
|
||||||
|
tmp1 = datspace[startpl]; //Read out, sin component. 4
|
||||||
|
tmp1 -= tmp1>>6; //Subtract from the MSB (with carry) 2
|
||||||
|
tmp1 += tc>>6; //Add MSBs with carry 2
|
||||||
|
|
||||||
|
datspace[startpl++] = tmp1; //Store values back 4
|
||||||
|
|
||||||
|
datspace[startpl-3] = ipl; //Store values back 4
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void SetupConstants()
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
static int last_place;
|
||||||
|
|
||||||
|
if( !donefirstrun )
|
||||||
|
{
|
||||||
|
donefirstrun = 1;
|
||||||
|
for( i = 0; i < 256; i++ )
|
||||||
|
{
|
||||||
|
sintable[i*2+0] = i;//(int8_t)((sin( i / 256.0 * 6.283 ) * 127.0));
|
||||||
|
sintable[i*2+1] = i+1;//(int8_t)((cos( i / 256.0 * 6.283 ) * 127.0));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
for( i = 0; i < bins; i++ )
|
||||||
|
{
|
||||||
|
float freq = i;//frequencies[i];
|
||||||
|
datspace[i*4] = 65536.0/freq;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
void DoDFTProgressiveInteger( float * outbins, float * frequencies, int bins, const float * databuffer, int place_in_data_buffer, int size_of_data_buffer, float q, float speedup )
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
static int last_place;
|
||||||
|
|
||||||
|
if( !donefirstrun )
|
||||||
|
{
|
||||||
|
donefirstrun = 1;
|
||||||
|
for( i = 0; i < 256; i++ )
|
||||||
|
{
|
||||||
|
sintable[i*2+0] = (int8_t)((sinf( i / 256.0 * 6.283 ) * 127.0));
|
||||||
|
sintable[i*2+1] = (int8_t)((cosf( i / 256.0 * 6.283 ) * 127.0));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if( gbins != bins )
|
||||||
|
{
|
||||||
|
gbins = bins;
|
||||||
|
if( datspace ) free( datspace );
|
||||||
|
datspace = malloc( bins * 2 * 4 );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
for( i = 0; i < bins; i++ )
|
||||||
|
{
|
||||||
|
float freq = frequencies[i];
|
||||||
|
datspace[i*4] = 65536.0/freq;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
for( i = last_place; i != ( place_in_data_buffer&0xffffe ); i = (i+2)%size_of_data_buffer )
|
||||||
|
{
|
||||||
|
int8_t ifr1 = (int8_t)( ((databuffer[i+0]) ) * 127 );
|
||||||
|
int8_t ifr2 = (int8_t)( ((databuffer[i+1]) ) * 127 );
|
||||||
|
// printf( "%d %d\n", i, place_in_data_buffer&0xffffe );
|
||||||
|
HandleProgressiveInt( ifr1, ifr2 );
|
||||||
|
}
|
||||||
|
|
||||||
|
last_place = place_in_data_buffer&0xfffe;
|
||||||
|
|
||||||
|
//Extract bins.
|
||||||
|
for( i = 0; i < bins; i++ )
|
||||||
|
{
|
||||||
|
int16_t isps = datspace[i*4+2];
|
||||||
|
int16_t ispc = datspace[i*4+3];
|
||||||
|
int16_t mux = ( (isps/256) * (isps/256)) + ((ispc/256) * (ispc/256));
|
||||||
|
// printf( "%d (%d %d)\n", mux, isps, ispc );
|
||||||
|
outbins[i] = sqrt( mux )/100.0;
|
||||||
|
}
|
||||||
|
// printf( "\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
*/
|
17
embedded8266/user/colorchord.h
Normal file
17
embedded8266/user/colorchord.h
Normal file
|
@ -0,0 +1,17 @@
|
||||||
|
#ifndef _COLORCHORD_H
|
||||||
|
#define _COLORCHORD_H
|
||||||
|
|
||||||
|
#include "mem.h"
|
||||||
|
#include "c_types.h"
|
||||||
|
#include "user_interface.h"
|
||||||
|
#include "ets_sys.h"
|
||||||
|
#include "osapi.h"
|
||||||
|
|
||||||
|
#define bins 120
|
||||||
|
|
||||||
|
void HandleProgressiveInt( int8_t sample1, int8_t sample2 );
|
||||||
|
void SetupConstants();
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
3
embedded8266/user/mystuff.c
Normal file
3
embedded8266/user/mystuff.c
Normal file
|
@ -0,0 +1,3 @@
|
||||||
|
#include "mystuff.h"
|
||||||
|
|
||||||
|
char generic_print_buffer[384];
|
8
embedded8266/user/mystuff.h
Normal file
8
embedded8266/user/mystuff.h
Normal file
|
@ -0,0 +1,8 @@
|
||||||
|
#ifndef _MYSTUFF_H
|
||||||
|
#define _MYSTUFF_H
|
||||||
|
|
||||||
|
extern char generic_print_buffer[384];
|
||||||
|
|
||||||
|
#define printf( ... ) os_sprintf( generic_print_buffer, __VA_ARGS__ ); uart0_sendStr( generic_print_buffer );
|
||||||
|
|
||||||
|
#endif
|
143
embedded8266/user/user_main.c
Normal file
143
embedded8266/user/user_main.c
Normal file
|
@ -0,0 +1,143 @@
|
||||||
|
#include "mem.h"
|
||||||
|
#include "c_types.h"
|
||||||
|
#include "user_interface.h"
|
||||||
|
#include "ets_sys.h"
|
||||||
|
#include "driver/uart.h"
|
||||||
|
#include "osapi.h"
|
||||||
|
#include "espconn.h"
|
||||||
|
#include "mystuff.h"
|
||||||
|
#include "ws2812.h"
|
||||||
|
|
||||||
|
#define PORT 7777
|
||||||
|
#define SERVER_TIMEOUT 1000
|
||||||
|
#define MAX_CONNS 5
|
||||||
|
#define MAX_FRAME 2000
|
||||||
|
|
||||||
|
#define procTaskPrio 0
|
||||||
|
#define procTaskQueueLen 1
|
||||||
|
|
||||||
|
|
||||||
|
static volatile os_timer_t some_timer;
|
||||||
|
static struct espconn *pUdpServer;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//Note to self. In future consider looking at this: http://pastebin.com/6eLxSrNz
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//Tasks that happen all the time.
|
||||||
|
|
||||||
|
os_event_t procTaskQueue[procTaskQueueLen];
|
||||||
|
static void ICACHE_FLASH_ATTR
|
||||||
|
procTask(os_event_t *events)
|
||||||
|
{
|
||||||
|
system_os_post(procTaskPrio, 0, 0 );
|
||||||
|
if( events->sig == 0 && events->par == 0 )
|
||||||
|
{
|
||||||
|
//Idle Event.
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
//Timer event.
|
||||||
|
static void ICACHE_FLASH_ATTR
|
||||||
|
myTimer(void *arg)
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
uart0_sendStr(".");
|
||||||
|
SetupConstants();
|
||||||
|
|
||||||
|
#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
|
||||||
|
gpio_output_set(bit_value<<gpio_no, ((~bit_value)&0x01)<<gpio_no, 1<<gpio_no,0)
|
||||||
|
GPIO_OUTPUT_SET(GPIO_ID_PIN(WSGPIO), 0);
|
||||||
|
|
||||||
|
WRITE_PERI_REG( PERIPHS_GPIO_BASEADDR + GPIO_ID_PIN(WSGPIO), 1 );
|
||||||
|
|
||||||
|
//XXX LOOK HERE!!!
|
||||||
|
//Right now, I am not actually using real data from the inputs, but rather doing this to test performance of my algorithm.
|
||||||
|
//The next step is to take real ADC inpts.
|
||||||
|
for( i = 0; i < 4000; i++ )
|
||||||
|
{
|
||||||
|
HandleProgressiveInt( 0xaa, 0xbb );
|
||||||
|
}
|
||||||
|
|
||||||
|
WRITE_PERI_REG( PERIPHS_GPIO_BASEADDR + GPIO_ID_PIN(WSGPIO), 0 );
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
//Called when new packet comes in.
|
||||||
|
static void ICACHE_FLASH_ATTR
|
||||||
|
udpserver_recv(void *arg, char *pusrdata, unsigned short len)
|
||||||
|
{
|
||||||
|
int i = 0;
|
||||||
|
struct espconn *pespconn = (struct espconn *)arg;
|
||||||
|
uint8_t buffer[MAX_FRAME];
|
||||||
|
|
||||||
|
//Make sure watchdog is disabled. WS2812's take a while and can mess it up.
|
||||||
|
ets_wdt_disable();
|
||||||
|
os_intr_lock();
|
||||||
|
WS2812OutBuffer( pusrdata, len );
|
||||||
|
os_intr_unlock();
|
||||||
|
ets_sprintf( buffer, "%d\r\n", len );
|
||||||
|
uart0_sendStr(buffer);
|
||||||
|
}
|
||||||
|
|
||||||
|
void ICACHE_FLASH_ATTR at_recvTask()
|
||||||
|
{
|
||||||
|
//Called from UART.
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void user_init(void)
|
||||||
|
{
|
||||||
|
uart_init(BIT_RATE_115200, BIT_RATE_115200);
|
||||||
|
int wifiMode = wifi_get_opmode();
|
||||||
|
|
||||||
|
uart0_sendStr("\r\nCustom Server\r\n");
|
||||||
|
|
||||||
|
wifi_set_opmode( 2 ); //We broadcast our ESSID, wait for peopel to join.
|
||||||
|
|
||||||
|
pUdpServer = (struct espconn *)os_zalloc(sizeof(struct espconn));
|
||||||
|
ets_memset( pUdpServer, 0, sizeof( struct espconn ) );
|
||||||
|
espconn_create( pUdpServer );
|
||||||
|
pUdpServer->type = ESPCONN_UDP;
|
||||||
|
pUdpServer->proto.udp = (esp_udp *)os_zalloc(sizeof(esp_udp));
|
||||||
|
pUdpServer->proto.udp->local_port = 7777;
|
||||||
|
espconn_regist_recvcb(pUdpServer, udpserver_recv);
|
||||||
|
|
||||||
|
wifi_station_dhcpc_start();
|
||||||
|
|
||||||
|
if( espconn_create( pUdpServer ) )
|
||||||
|
{
|
||||||
|
while(1) { uart0_sendStr( "\r\nFAULT\r\n" ); }
|
||||||
|
}
|
||||||
|
|
||||||
|
//XXX TODO figure out how to safely re-allow this.
|
||||||
|
ets_wdt_disable();
|
||||||
|
|
||||||
|
char outbuffer[] = { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,0xff,0xff, 0x00,0xff,0x00 };
|
||||||
|
WS2812OutBuffer( outbuffer, 1 ); //Initialize the output.
|
||||||
|
|
||||||
|
//Add a process
|
||||||
|
system_os_task(procTask, procTaskPrio, procTaskQueue, procTaskQueueLen);
|
||||||
|
|
||||||
|
uart0_sendStr("\r\nCustom Server\r\n");
|
||||||
|
WS2812OutBuffer( outbuffer, sizeof(outbuffer) );
|
||||||
|
|
||||||
|
|
||||||
|
//Timer example
|
||||||
|
os_timer_disarm(&some_timer);
|
||||||
|
os_timer_setfn(&some_timer, (os_timer_func_t *)myTimer, NULL);
|
||||||
|
os_timer_arm(&some_timer, 1000, 1);
|
||||||
|
|
||||||
|
system_os_post(procTaskPrio, 0, 0 );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
61
embedded8266/user/ws2812.c
Normal file
61
embedded8266/user/ws2812.c
Normal file
|
@ -0,0 +1,61 @@
|
||||||
|
#include "ws2812.h"
|
||||||
|
#include "ets_sys.h"
|
||||||
|
#include "mystuff.h"
|
||||||
|
#include "osapi.h"
|
||||||
|
|
||||||
|
#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
|
||||||
|
gpio_output_set(bit_value<<gpio_no, ((~bit_value)&0x01)<<gpio_no, 1<<gpio_no,0)
|
||||||
|
|
||||||
|
|
||||||
|
//I just used a scope to figure out the right time periods.
|
||||||
|
|
||||||
|
void SEND_WS_0()
|
||||||
|
{
|
||||||
|
uint8_t time = 8;
|
||||||
|
WRITE_PERI_REG( PERIPHS_GPIO_BASEADDR + GPIO_ID_PIN(WSGPIO), 1 );
|
||||||
|
WRITE_PERI_REG( PERIPHS_GPIO_BASEADDR + GPIO_ID_PIN(WSGPIO), 1 );
|
||||||
|
while(time--)
|
||||||
|
{
|
||||||
|
WRITE_PERI_REG( PERIPHS_GPIO_BASEADDR + GPIO_ID_PIN(WSGPIO), 0 );
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void SEND_WS_1()
|
||||||
|
{
|
||||||
|
uint8_t time = 9;
|
||||||
|
while(time--)
|
||||||
|
{
|
||||||
|
WRITE_PERI_REG( PERIPHS_GPIO_BASEADDR + GPIO_ID_PIN(WSGPIO), 1 );
|
||||||
|
}
|
||||||
|
time = 3;
|
||||||
|
while(time--)
|
||||||
|
{
|
||||||
|
WRITE_PERI_REG( PERIPHS_GPIO_BASEADDR + GPIO_ID_PIN(WSGPIO), 0 );
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void WS2812OutBuffer( uint8_t * buffer, uint16_t length )
|
||||||
|
{
|
||||||
|
uint16_t i;
|
||||||
|
GPIO_OUTPUT_SET(GPIO_ID_PIN(WSGPIO), 0);
|
||||||
|
for( i = 0; i < length; i++ )
|
||||||
|
{
|
||||||
|
uint8_t byte = buffer[i];
|
||||||
|
if( byte & 0x80 ) SEND_WS_1(); else SEND_WS_0();
|
||||||
|
if( byte & 0x40 ) SEND_WS_1(); else SEND_WS_0();
|
||||||
|
if( byte & 0x20 ) SEND_WS_1(); else SEND_WS_0();
|
||||||
|
if( byte & 0x10 ) SEND_WS_1(); else SEND_WS_0();
|
||||||
|
if( byte & 0x08 ) SEND_WS_1(); else SEND_WS_0();
|
||||||
|
if( byte & 0x04 ) SEND_WS_1(); else SEND_WS_0();
|
||||||
|
if( byte & 0x02 ) SEND_WS_1(); else SEND_WS_0();
|
||||||
|
if( byte & 0x01 ) SEND_WS_1(); else SEND_WS_0();
|
||||||
|
}
|
||||||
|
//reset will happen when it's low long enough.
|
||||||
|
//(don't call this function twice within 10us)
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
16
embedded8266/user/ws2812.h
Normal file
16
embedded8266/user/ws2812.h
Normal file
|
@ -0,0 +1,16 @@
|
||||||
|
#ifndef _WS2812_H
|
||||||
|
#define _WS2812_H
|
||||||
|
|
||||||
|
#define WSGPIO 0
|
||||||
|
|
||||||
|
#include "c_types.h"
|
||||||
|
#include "user_interface.h"
|
||||||
|
#include "ets_sys.h"
|
||||||
|
#include "gpio.h"
|
||||||
|
|
||||||
|
//You will have to os_intr_lock(); os_intr_unlock();
|
||||||
|
|
||||||
|
void WS2812OutBuffer( uint8_t * buffer, uint16_t length );
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
Loading…
Reference in a new issue